From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Received: from mga07.intel.com ([134.134.136.100]:48200 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388935AbeKGCMy (ORCPT ); Tue, 6 Nov 2018 21:12:54 -0500 From: richard.gong@linux.intel.com Subject: [PATCHv10 5/8] arm64: dts: stratix10: add fpga manager and region Date: Tue, 6 Nov 2018 10:52:49 -0600 Message-Id: <1541523172-5171-6-git-send-email-richard.gong@linux.intel.com> In-Reply-To: <1541523172-5171-1-git-send-email-richard.gong@linux.intel.com> References: <1541523172-5171-1-git-send-email-richard.gong@linux.intel.com> Sender: linux-fpga-owner@vger.kernel.org List-Id: linux-fpga@vger.kernel.org To: gregkh@linuxfoundation.org, catalin.marinas@arm.com, will.deacon@arm.com, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, atull@kernel.org, mdf@kernel.org, arnd@arndb.de, corbet@lwn.net Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, todd.riffel@intel.com, richard.gong@intel.com From: Alan Tull Add the Stratix10 FPGA manager and a FPGA region to the device tree. Signed-off-by: Alan Tull Signed-off-by: Richard Gong --- v2: this patch is added in patch set version 2 v3: change to put fpga_mgr node under firmware/svc node v4: s/fpga-mgr@0/fpga-mgr/ to remove unit_address add Richard's signed-off-by v5: no change v6: no change v7: no change v8: no change v9: no change v10: no change --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index a43ed05..62550a1 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -106,6 +106,14 @@ interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; + base_fpga_region { + #address-cells = <0x1>; + #size-cells = <0x1>; + + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr>; + }; + clkmgr: clock-controller@ffd10000 { compatible = "intel,stratix10-clkmgr"; reg = <0xffd10000 0x1000>; @@ -553,6 +561,10 @@ compatible = "intel,stratix10-svc"; method = "smc"; memory-region = <&service_reserved>; + + fpga_mgr: fpga-mgr { + compatible = "intel,stratix10-soc-fpga-mgr"; + }; }; }; }; -- 2.7.4