From: Tom Rix <trix@redhat.com>
To: Russ Weight <russell.h.weight@intel.com>,
mdf@kernel.org, lee.jones@linaro.org, linux-fpga@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com,
matthew.gerlach@intel.com
Subject: Re: [PATCH v5 2/6] fpga: m10bmc-sec: create max10 bmc secure update driver
Date: Wed, 18 Nov 2020 07:47:34 -0800 [thread overview]
Message-ID: <1e9cf9b4-18db-be29-1133-c15e2e55cbd6@redhat.com> (raw)
In-Reply-To: <dd900582-5179-d877-2a21-c592b34fc831@intel.com>
>>> + return -EINVAL;
>>> + }
>>> +
>>> + ret = regmap_bulk_read(sec->m10bmc->regmap, reh_addr,
>>> + hash, sha_num_bytes / stride);
>> Assumes !(sha_num_bytes % stride)
> Yes - good point. I'll add WARN_ON() here and for the CSK cancellation vectors.
> In these cases, the size values are fixed, so a WARN_ON should be sufficient.
Yes, thanks.
Tom
> Thanks,
> - Russ
>
next prev parent reply other threads:[~2020-11-18 15:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-14 0:55 [PATCH v5 0/6] Intel MAX10 BMC Secure Update Driver Russ Weight
2020-11-14 0:55 ` [PATCH v5 1/6] mfd: intel-m10-bmc: support for MAX10 BMC Secure Updates Russ Weight
2020-11-14 0:55 ` [PATCH v5 2/6] fpga: m10bmc-sec: create max10 bmc secure update driver Russ Weight
2020-11-15 13:44 ` Tom Rix
2020-11-17 23:38 ` Russ Weight
2020-11-18 15:47 ` Tom Rix [this message]
2020-11-14 0:55 ` [PATCH v5 3/6] fpga: m10bmc-sec: expose max10 flash update count Russ Weight
2020-11-15 20:03 ` Moritz Fischer
2020-11-17 23:45 ` Russ Weight
2020-11-14 0:55 ` [PATCH v5 4/6] fpga: m10bmc-sec: expose max10 canceled keys in sysfs Russ Weight
2020-11-14 0:55 ` [PATCH v5 5/6] fpga: m10bmc-sec: add max10 secure update functions Russ Weight
2020-11-15 14:17 ` Tom Rix
2020-11-18 0:10 ` Russ Weight
2020-11-18 15:57 ` Tom Rix
2020-11-14 0:55 ` [PATCH v5 6/6] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func Russ Weight
2020-11-15 14:20 ` Tom Rix
2020-11-18 0:16 ` Russ Weight
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