From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 25 Feb 2020 11:27:34 -0600 From: Rob Herring Subject: Re: [PATCHv1 1/7] dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding Message-ID: <20200225172734.GA29404@bogus> References: <1581696052-11540-1-git-send-email-richard.gong@linux.intel.com> <1581696052-11540-2-git-send-email-richard.gong@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1581696052-11540-2-git-send-email-richard.gong@linux.intel.com> To: richard.gong@linux.intel.com Cc: gregkh@linuxfoundation.org, mdf@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, dinguyen@kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Gong List-ID: On Fri, 14 Feb 2020 10:00:46 -0600, richard.gong@linux.intel.com wrote: > From: Richard Gong > > Add a compatible property value to Stratix10 SoC FPGA manager binding file > > Signed-off-by: Richard Gong > --- > .../devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Acked-by: Rob Herring