From: Moritz Fischer <mdf@kernel.org>
To: Alexandru Ardelean <ardeleanalex@gmail.com>
Cc: Alexandru Ardelean <alexandru.ardelean@analog.com>,
linux-clk@vger.kernel.org, linux-fpga@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>,
mturquette@baylibre.com, Stephen Boyd <sboyd@kernel.org>,
Moritz Fischer <mdf@kernel.org>
Subject: Re: [PATCH v2 0/6] clk: axi-clk-gen: misc updates to the driver
Date: Mon, 14 Sep 2020 19:41:38 -0700 [thread overview]
Message-ID: <20200915024138.GA1827@epycbox.lan> (raw)
In-Reply-To: <CA+U=Dsr41kKGXmgE1KjdTzAso3rwtNXAEoSy+Li=uym7G=D=Jw@mail.gmail.com>
On Mon, Sep 14, 2020 at 11:11:05AM +0300, Alexandru Ardelean wrote:
> On Mon, Aug 10, 2020 at 4:41 PM Alexandru Ardelean
> <alexandru.ardelean@analog.com> wrote:
> >
> > These patches synchronize the driver with the current state in the
> > Analog Devices Linux tree:
> > https://github.com/analogdevicesinc/linux/
> >
> > They have been in the tree for about 2-3, so they did receive some
> > testing.
>
> Ping on this series.
> Do I need to do a re-send?
I've applied the FPGA one, the other ones should go through the clock
tree I think?
>
> >
> > Highlights are:
> > * Add support for fractional dividers (Lars-Peter Clausen)
> > * Enable support for ZynqMP (UltraScale) (Dragos Bogdan)
> > * Support frequency limits for ZynqMP (Mathias Tausen)
> > - And continued by Mircea Caprioru, to read them from the IP cores
> >
> > Changelog v1 -> v2:
> > - in patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs'
> > * converted enums to #define
> > * added Intel FPGA definitions
> > * added Device-Package definitions
> > * added INTEL / XILINX in the define names
> > definitions according to:
> > https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_intel_device_info_enc.tcl
> > https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_xilinx_device_info_enc.tcl
> >
> > Dragos Bogdan (1):
> > clk: axi-clkgen: add support for ZynqMP (UltraScale)
> >
> > Lars-Peter Clausen (2):
> > clk: axi-clkgen: Add support for fractional dividers
> > clk: axi-clkgen: Set power bits for fractional mode
> >
> > Mathias Tausen (1):
> > clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits
> >
> > Mircea Caprioru (2):
> > include: fpga: adi-axi-common.h: add definitions for supported FPGAs
> > clk: axi-clkgen: Add support for FPGA info
> >
> > drivers/clk/Kconfig | 2 +-
> > drivers/clk/clk-axi-clkgen.c | 253 ++++++++++++++++++++++------
> > include/linux/fpga/adi-axi-common.h | 103 +++++++++++
> > 3 files changed, 302 insertions(+), 56 deletions(-)
> >
> > --
> > 2.17.1
> >
Thanks,
Moritz
next prev parent reply other threads:[~2020-09-15 2:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-10 13:42 [PATCH v2 0/6] clk: axi-clk-gen: misc updates to the driver Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 1/6] clk: axi-clkgen: Add support for fractional dividers Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 2/6] clk: axi-clkgen: Set power bits for fractional mode Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 3/6] clk: axi-clkgen: add support for ZynqMP (UltraScale) Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 4/6] clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 5/6] include: fpga: adi-axi-common.h: add definitions for supported FPGAs Alexandru Ardelean
2020-08-10 14:07 ` Tom Rix
2020-09-14 21:46 ` Moritz Fischer
2020-08-10 13:42 ` [PATCH v2 6/6] clk: axi-clkgen: Add support for FPGA info Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 0/6] clk: axi-clk-gen: misc updates to the driver Alexandru Ardelean
2020-09-14 8:11 ` Alexandru Ardelean
2020-09-15 2:41 ` Moritz Fischer [this message]
2020-09-22 19:42 ` Stephen Boyd
2020-09-23 6:22 ` Alexandru Ardelean
2020-09-23 23:58 ` Stephen Boyd
2020-09-24 4:53 ` Moritz Fischer
2020-09-24 5:41 ` Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 1/6] clk: axi-clkgen: Add support for fractional dividers Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 2/6] clk: axi-clkgen: Set power bits for fractional mode Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 3/6] clk: axi-clkgen: add support for ZynqMP (UltraScale) Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 4/6] clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 5/6] include: fpga: adi-axi-common.h: add definitions for supported FPGAs Alexandru Ardelean
2020-08-10 13:42 ` [PATCH v2 6/6] clk: axi-clkgen: Add support for FPGA info Alexandru Ardelean
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