From: Russ Weight <russell.h.weight@intel.com>
To: mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: trix@redhat.com, lgoncalv@redhat.com, yilun.xu@intel.com,
hao.wu@intel.com, matthew.gerlach@intel.com,
Russ Weight <russell.h.weight@intel.com>
Subject: [PATCH v2 7/7] fpga: sec-mgr: expose hardware error info
Date: Fri, 2 Oct 2020 15:37:01 -0700 [thread overview]
Message-ID: <20201002223701.1317-8-russell.h.weight@intel.com> (raw)
In-Reply-To: <20201002223701.1317-1-russell.h.weight@intel.com>
Extend the Intel Security Manager class driver to include
an optional update/hw_errinfo sysfs node that can be used
to retrieve 64 bits of device specific error information
following a secure update failure.
The underlying driver must provide a get_hw_errinfo() callback
function to enable this feature. This data is treated as
opaque by the class driver. It is left to user-space software
or support personnel to interpret this data.
Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2:
- Bumped documentation date and version
---
.../ABI/testing/sysfs-class-ifpga-sec-mgr | 14 +++++++
drivers/fpga/ifpga-sec-mgr.c | 38 +++++++++++++++++++
include/linux/fpga/ifpga-sec-mgr.h | 5 +++
3 files changed, 57 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-class-ifpga-sec-mgr b/Documentation/ABI/testing/sysfs-class-ifpga-sec-mgr
index caafe7eb7670..37a335ff4936 100644
--- a/Documentation/ABI/testing/sysfs-class-ifpga-sec-mgr
+++ b/Documentation/ABI/testing/sysfs-class-ifpga-sec-mgr
@@ -127,3 +127,17 @@ Description: Read-only. Returns a string describing the failure
idle state. If this file is read while a secure
update is in progress, then the read will fail with
EBUSY.
+
+What: /sys/class/ifpga_sec_mgr/ifpga_secX/update/hw_errinfo
+Date: Oct 2020
+KernelVersion: 5.11
+Contact: Russ Weight <russell.h.weight@intel.com>
+Description: Read-only. Returns a 64 bit error value providing
+ hardware specific information that may be useful in
+ debugging errors that occur during FPGA image updates.
+ This file is only visible if the underlying device
+ supports it. The hw_errinfo value is only accessible
+ when the secure update engine is in the idle state.
+ If this file is read while a secure update is in
+ progress, then the read will fail with EBUSY.
+ Format: "0x%llx".
diff --git a/drivers/fpga/ifpga-sec-mgr.c b/drivers/fpga/ifpga-sec-mgr.c
index 6267ac3a0780..eb306dff7d31 100644
--- a/drivers/fpga/ifpga-sec-mgr.c
+++ b/drivers/fpga/ifpga-sec-mgr.c
@@ -152,10 +152,17 @@ static void set_error(struct ifpga_sec_mgr *imgr, enum ifpga_sec_err err_code)
imgr->err_code = err_code;
}
+static void set_hw_errinfo(struct ifpga_sec_mgr *imgr)
+{
+ if (imgr->iops->get_hw_errinfo)
+ imgr->hw_errinfo = imgr->iops->get_hw_errinfo(imgr);
+}
+
static void ifpga_sec_dev_error(struct ifpga_sec_mgr *imgr,
enum ifpga_sec_err err_code)
{
set_error(imgr, err_code);
+ set_hw_errinfo(imgr);
imgr->iops->cancel(imgr);
}
@@ -373,6 +380,23 @@ error_show(struct device *dev, struct device_attribute *attr, char *buf)
}
static DEVICE_ATTR_RO(error);
+static ssize_t
+hw_errinfo_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct ifpga_sec_mgr *imgr = to_sec_mgr(dev);
+ int ret;
+
+ mutex_lock(&imgr->lock);
+ if (imgr->progress != IFPGA_SEC_PROG_IDLE)
+ ret = -EBUSY;
+ else
+ ret = sprintf(buf, "0x%llx\n", imgr->hw_errinfo);
+ mutex_unlock(&imgr->lock);
+
+ return ret;
+}
+static DEVICE_ATTR_RO(hw_errinfo);
+
static ssize_t remaining_size_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -404,6 +428,7 @@ static ssize_t filename_store(struct device *dev, struct device_attribute *attr,
}
imgr->err_code = IFPGA_SEC_ERR_NONE;
+ imgr->hw_errinfo = 0;
imgr->request_cancel = false;
imgr->progress = IFPGA_SEC_PROG_READING;
reinit_completion(&imgr->update_done);
@@ -438,18 +463,31 @@ static ssize_t cancel_store(struct device *dev, struct device_attribute *attr,
}
static DEVICE_ATTR_WO(cancel);
+static umode_t
+sec_mgr_update_visible(struct kobject *kobj, struct attribute *attr, int n)
+{
+ struct ifpga_sec_mgr *imgr = to_sec_mgr(kobj_to_dev(kobj));
+
+ if (attr == &dev_attr_hw_errinfo.attr && !imgr->iops->get_hw_errinfo)
+ return 0;
+
+ return attr->mode;
+}
+
static struct attribute *sec_mgr_update_attrs[] = {
&dev_attr_filename.attr,
&dev_attr_cancel.attr,
&dev_attr_status.attr,
&dev_attr_error.attr,
&dev_attr_remaining_size.attr,
+ &dev_attr_hw_errinfo.attr,
NULL,
};
static struct attribute_group sec_mgr_update_attr_group = {
.name = "update",
.attrs = sec_mgr_update_attrs,
+ .is_visible = sec_mgr_update_visible,
};
static ssize_t name_show(struct device *dev,
diff --git a/include/linux/fpga/ifpga-sec-mgr.h b/include/linux/fpga/ifpga-sec-mgr.h
index 890be0800b05..baf4fe876164 100644
--- a/include/linux/fpga/ifpga-sec-mgr.h
+++ b/include/linux/fpga/ifpga-sec-mgr.h
@@ -60,6 +60,9 @@ enum ifpga_sec_err {
* function and is called at the completion
* of the update, whether success or failure,
* if the prepare function succeeded.
+ * @get_hw_errinfo: Optional: Return u64 hw specific error info.
+ * The software err_code may used to determine
+ * whether the hw error info is applicable.
*/
struct ifpga_sec_mgr_ops {
int (*user_flash_count)(struct ifpga_sec_mgr *imgr);
@@ -87,6 +90,7 @@ struct ifpga_sec_mgr_ops {
enum ifpga_sec_err (*poll_complete)(struct ifpga_sec_mgr *imgr);
void (*cleanup)(struct ifpga_sec_mgr *imgr);
enum ifpga_sec_err (*cancel)(struct ifpga_sec_mgr *imgr);
+ u64 (*get_hw_errinfo)(struct ifpga_sec_mgr *imgr);
};
/* Update progress codes */
@@ -112,6 +116,7 @@ struct ifpga_sec_mgr {
enum ifpga_sec_prog progress;
enum ifpga_sec_prog err_state; /* progress state at time of failure */
enum ifpga_sec_err err_code; /* security manager error code */
+ u64 hw_errinfo; /* 64 bits of HW specific error info */
bool request_cancel;
bool driver_unload;
void *priv;
--
2.17.1
next prev parent reply other threads:[~2020-10-02 22:37 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-02 22:36 [PATCH v2 0/7] Intel FPGA Security Manager Class Driver Russ Weight
2020-10-02 22:36 ` [PATCH v2 1/7] fpga: sec-mgr: intel fpga security manager class driver Russ Weight
2020-10-02 23:03 ` Russ Weight
2020-10-03 1:02 ` Moritz Fischer
2020-10-04 20:43 ` Tom Rix
2020-10-05 7:38 ` Wu, Hao
2020-10-06 0:05 ` Russ Weight
2020-10-06 1:01 ` Russ Weight
2020-10-02 22:36 ` [PATCH v2 2/7] fpga: sec-mgr: enable secure updates Russ Weight
2020-10-04 20:54 ` Tom Rix
2020-10-05 8:19 ` Wu, Hao
2020-10-06 18:55 ` Russ Weight
2020-10-02 22:36 ` [PATCH v2 3/7] fpga: sec-mgr: expose sec-mgr update status Russ Weight
2020-10-04 21:00 ` Tom Rix
2020-10-05 8:41 ` Wu, Hao
2020-10-06 19:46 ` Russ Weight
2020-10-02 22:36 ` [PATCH v2 4/7] fpga: sec-mgr: expose sec-mgr update errors Russ Weight
2020-10-04 21:06 ` Tom Rix
2020-10-05 8:55 ` Wu, Hao
2020-10-06 20:00 ` Russ Weight
2020-10-02 22:36 ` [PATCH v2 5/7] fpga: sec-mgr: expose sec-mgr update size Russ Weight
2020-10-02 22:37 ` [PATCH v2 6/7] fpga: sec-mgr: enable cancel of secure update Russ Weight
2020-10-04 21:13 ` Tom Rix
2020-10-02 22:37 ` Russ Weight [this message]
2020-10-04 21:19 ` [PATCH v2 0/7] Intel FPGA Security Manager Class Driver Tom Rix
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