From: Tianfei zhang <tianfei.zhang@intel.com>
To: hao.wu@intel.com, trix@redhat.com, mdf@kernel.org,
yilun.xu@intel.com, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, corbet@lwn.net,
Tianfei zhang <tianfei.zhang@intel.com>
Subject: [PATCH v3 2/5] fpga: dfl: add features in dfl_fpga_cdev
Date: Tue, 1 Mar 2022 01:21:20 -0500 [thread overview]
Message-ID: <20220301062123.818687-3-tianfei.zhang@intel.com> (raw)
In-Reply-To: <20220301062123.818687-1-tianfei.zhang@intel.com>
Introducing features in dfl_fpga_cdev during DFL enumeration.
On OFS, we will add more extensions or features in DFL in
future, so adding a new member "features"in dfl_fpga_cdev.
For example, in the legacy model, the AFU was connected to
Port device, but in "multiple VFs per PR slot" model, the
AFU or PR slot without connected to Port device directly,
so in this model, we only can access the resource of AFU
or PR slot via VFs. In this patch, we introducing a new
flags DFL_FEAT_PORT_CONNECTED_AFU to distinguish them.
Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
---
drivers/fpga/dfl.c | 6 +++++-
drivers/fpga/dfl.h | 5 +++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index 599bb21d86af..5872031c2e9f 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -1124,6 +1124,7 @@ static void build_info_complete(struct build_feature_devs_info *binfo)
static int parse_feature_fiu(struct build_feature_devs_info *binfo,
resource_size_t ofst)
{
+ struct dfl_fpga_cdev *cdev = binfo->cdev;
int ret = 0;
u32 offset;
u16 id;
@@ -1160,8 +1161,11 @@ static int parse_feature_fiu(struct build_feature_devs_info *binfo,
v = readq(binfo->ioaddr + NEXT_AFU);
offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
- if (offset)
+ if (offset) {
+ if (dfh_id_to_type(id) == PORT_ID)
+ cdev->features |= DFL_FEAT_PORT_CONNECTED_AFU;
return parse_feature_afu(binfo, offset);
+ }
dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 1fd493e82dd8..6171bcdcb3c5 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -461,6 +461,9 @@ int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
unsigned int nr_irqs, int *irq_table);
void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
+/* in legacy model, the AFU was connected to Port device */
+#define DFL_FEAT_PORT_CONNECTED_AFU BIT_ULL(0)
+
/**
* struct dfl_fpga_cdev - container device of DFL based FPGA
*
@@ -470,6 +473,7 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
* @lock: mutex lock to protect the port device list.
* @port_dev_list: list of all port feature devices under this container device.
* @released_port_num: released port number under this container device.
+ * @features: features discovered during DFL enumeration.
*/
struct dfl_fpga_cdev {
struct device *parent;
@@ -478,6 +482,7 @@ struct dfl_fpga_cdev {
struct mutex lock;
struct list_head port_dev_list;
int released_port_num;
+ u64 features;
};
struct dfl_fpga_cdev *
--
2.26.2
next prev parent reply other threads:[~2022-03-01 6:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-01 6:21 [PATCH v3 0/5] Add OFS support for DFL driver Tianfei zhang
2022-03-01 6:21 ` [PATCH v3 1/5] fpga: dfl: Allow for ports without specific bar space Tianfei zhang
2022-03-01 6:44 ` Wu, Hao
2022-03-01 6:50 ` Zhang, Tianfei
2022-03-01 6:21 ` Tianfei zhang [this message]
2022-03-01 6:59 ` [PATCH v3 2/5] fpga: dfl: add features in dfl_fpga_cdev Wu, Hao
2022-03-01 6:21 ` [PATCH v3 3/5] fpga: dfl: fix VF creation in OFS Tianfei zhang
2022-03-01 7:13 ` Wu, Hao
2022-03-01 6:21 ` [PATCH v3 4/5] fpga: dfl: Handle dfl's starting with AFU Tianfei zhang
2022-03-01 7:27 ` Wu, Hao
2022-03-02 2:42 ` Zhang, Tianfei
2022-03-01 6:21 ` [PATCH v3 5/5] Documentation: fpga: dfl: add description of OFS Tianfei zhang
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