[PATCH v5 2/2] Documentation: fpga: dfl: add description of Feature ID

[Tianfei Zhang <tianfei.zhang@intel.com>]

From: Tianfei zhang <tianfei.zhang@intel.com>

This patch adds the description and registration of Feature ID
in documentation.

Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
---
v5: fix documentation from Matthew's comment.
---
 Documentation/fpga/dfl.rst | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index ef9eec71f6f3..231fe7a4d099 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -502,6 +502,16 @@ Developer only needs to provide a sub feature driver with matched feature id.
 FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
 could be a reference.
 
+Individual DFL drivers are bound DFL devices based on Feature Type and Feature ID.
+The definition of Feature Type and Feature ID can be found:
+
+https://github.com/OPAE/linux-dfl-feature-id/blob/master/dfl-feature-ids.rst
+
+If you want to add a new feature ID for FPGA DFL feature device, you must submit a pull
+request to register a feature ID for DFL. Here is the DFL Feature ID Registry:
+
+https://github.com/OPAE/linux-dfl-feature-id
+
 Location of DFLs on a PCI Device
 ================================
 The original method for finding a DFL on a PCI device assumed the start of the
-- 
2.26.2