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From: Ivan Bornyakov <i.bornyakov@metrotek.ru>
To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com,
	trix@redhat.com, corbet@lwn.net
Cc: Ivan Bornyakov <brnkv.i1@gmail.com>,
	Conor.Dooley@microchip.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, linux-fpga@vger.kernel.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, system@metrotek.ru,
	Ivan Bornyakov <i.bornyakov@metrotek.ru>
Subject: [PATCH v17 2/4] docs: fpga: mgr: document parse_header() callback
Date: Thu,  9 Jun 2022 18:47:50 +0300	[thread overview]
Message-ID: <20220609154752.20781-3-i.bornyakov@metrotek.ru> (raw)
In-Reply-To: <20220609154752.20781-1-i.bornyakov@metrotek.ru>

Document newly introduced fpga_manager_ops callback parse_header() along
with header_size and data_size fields of struct fpga_image_info.

Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
---
 Documentation/driver-api/fpga/fpga-mgr.rst | 31 ++++++++++++++++------
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/Documentation/driver-api/fpga/fpga-mgr.rst b/Documentation/driver-api/fpga/fpga-mgr.rst
index 42c01f396dce..db0852bd3ddc 100644
--- a/Documentation/driver-api/fpga/fpga-mgr.rst
+++ b/Documentation/driver-api/fpga/fpga-mgr.rst
@@ -79,14 +79,29 @@ do the programming sequence for this particular FPGA.  These ops return 0 for
 success or negative error codes otherwise.
 
 The programming sequence is::
- 1. .write_init
- 2. .write or .write_sg (may be called once or multiple times)
- 3. .write_complete
-
-The .write_init function will prepare the FPGA to receive the image data.  The
-buffer passed into .write_init will be at most .initial_header_size bytes long;
-if the whole bitstream is not immediately available then the core code will
-buffer up at least this much before starting.
+ 1. .parse_header
+ 2. .write_init
+ 3. .write or .write_sg (may be called once or multiple times)
+ 4. .write_complete
+
+The .parse_header function will set header_size and data_size to
+struct fpga_image_info. If header_size is set, .write function will get image
+buffer starting at header_size offset from the beginning. If data_size is set,
+.write function will get data_size bytes of the image buffer, otherwise .write
+will get data up to the end of image buffer. This will not affect .write_sg,
+.write_sg will still get whole image in sg_table form. If FPGA image is a
+single contiguous buffer, whole buffer will be passed into .parse_header.
+If image is in scatter-gather form, core code will buffer up at least
+.initial_header_size before the first call of .parse_header, if it is not
+enough, .parse_header should set desired size into info->header_size and
+return -EAGAIN, then it will be called again with greater part of image buffer
+on the input.
+
+The .write_init function will prepare the FPGA to receive the image data. The
+buffer passed into .write_init will be at least info->header_size bytes long,
+if it's defined, otherwise .initial_header_size; if the whole bitstream is not
+immediately available then the core code will buffer up at least this much
+before starting.
 
 The .write function writes a buffer to the FPGA. The buffer may be contain the
 whole FPGA image or may be a smaller chunk of an FPGA image.  In the latter
-- 
2.35.1



  parent reply	other threads:[~2022-06-09 16:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-09 15:47 [PATCH v17 0/4] Microchip Polarfire FPGA manager Ivan Bornyakov
2022-06-09 15:47 ` [PATCH v17 1/4] fpga: fpga-mgr: support bitstream offset in image buffer Ivan Bornyakov
2022-06-10  7:43   ` Xu Yilun
2022-06-10  8:04     ` Xu Yilun
2022-06-10  8:13     ` Ivan Bornyakov
2022-06-10  8:42       ` Xu Yilun
2022-06-10 10:43       ` Ivan Bornyakov
2022-06-09 15:47 ` Ivan Bornyakov [this message]
2022-06-10  7:15   ` [PATCH v17 2/4] docs: fpga: mgr: document parse_header() callback Xu Yilun
2022-06-09 15:47 ` [PATCH v17 3/4] fpga: microchip-spi: add Microchip MPF FPGA manager Ivan Bornyakov
2022-06-09 15:47 ` [PATCH v17 4/4] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr Ivan Bornyakov

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