From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-fpga@vger.kernel.org, Xu Yilun <yilun.xu@intel.com>,
Wu Hao <hao.wu@intel.com>, Tom Rix <trix@redhat.com>,
Moritz Fischer <mdf@kernel.org>, Lee Jones <lee@kernel.org>,
Matthew Gerlach <matthew.gerlach@linux.intel.com>,
Russ Weight <russell.h.weight@intel.com>,
Tianfei zhang <tianfei.zhang@intel.com>,
Mark Brown <broonie@kernel.org>,
Greg KH <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 09/12] intel-m10-bmc: Add regmap_indirect_cfg for Intel FPGA IPs
Date: Tue, 8 Nov 2022 16:43:02 +0200 [thread overview]
Message-ID: <20221108144305.45424-10-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20221108144305.45424-1-ilpo.jarvinen@linux.intel.com>
Create the regmap_indirect_cfg with offsets and commands for Intel FPGA
IPs indirect register access.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
include/linux/mfd/intel-m10-bmc.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index ed920f76d3c8..1b907c1a176f 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -15,6 +15,19 @@ enum m10bmc_type {
M10_N5010,
};
+#define INTEL_M10_REGMAP_INDIRECT_CFG \
+ .cmd_offset = 0, \
+ .idle_cmd = 0, \
+ .read_cmd = BIT(0), \
+ .write_cmd = BIT(1), \
+ .ack_offset = 0, \
+ .ack_mask = BIT(2), \
+ .addr_offset = 0x4, \
+ .read_offset = 0x8, \
+ .write_offset = 0xc, \
+ .sleep_us = 1, \
+ .timeout_us = 10000
+
#define M10BMC_STAGING_SIZE 0x3800000
/* Doorbell register fields */
--
2.30.2
next prev parent reply other threads:[~2022-11-08 14:47 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 14:42 [PATCH 00/12] intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 01/12] mfd: intel-m10-bmc: Move m10bmc_type to header Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 02/12] mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info Ilpo Järvinen
2022-11-11 10:12 ` Xu Yilun
2022-11-11 11:49 ` Ilpo Järvinen
2022-11-14 1:58 ` Xu Yilun
2022-11-15 1:17 ` Russ Weight
2022-11-15 1:55 ` Xu Yilun
2022-11-15 8:56 ` Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 03/12] mfd: intel-m10-bmc: Rename the local variables Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 04/12] mfd: intel-m10-bmc: Split into core and spi specific parts Ilpo Järvinen
2022-11-08 17:05 ` Guenter Roeck
2022-11-08 14:42 ` [PATCH 05/12] mfd: intel-m10-bmc: Support multiple CSR register layouts Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 06/12] fpga: intel-m10-bmc: Add flash ops for sec update Ilpo Järvinen
2022-11-11 8:41 ` Xu Yilun
2022-11-11 13:32 ` Ilpo Järvinen
2022-11-14 7:31 ` Xu Yilun
2022-11-15 1:43 ` Russ Weight
2022-11-15 2:55 ` Xu Yilun
2022-11-08 14:43 ` [PATCH 07/12] mfd: intel-m10-bmc: Downscope SPI related defines Ilpo Järvinen
2022-11-11 9:29 ` Xu Yilun
2022-11-11 11:20 ` Ilpo Järvinen
2022-11-14 7:33 ` Xu Yilun
2022-11-08 14:43 ` [PATCH 08/12] regmap: indirect: Add indirect regmap support Ilpo Järvinen
2022-11-14 20:38 ` Marco Pagani
2022-11-16 17:00 ` matthew.gerlach
2022-11-08 14:43 ` Ilpo Järvinen [this message]
2022-11-08 18:29 ` [PATCH 09/12] intel-m10-bmc: Add regmap_indirect_cfg for Intel FPGA IPs matthew.gerlach
2022-11-08 14:43 ` [PATCH 10/12] mfd: intel-m10-bmc: Add PMCI driver Ilpo Järvinen
2022-11-11 10:04 ` Xu Yilun
2022-11-11 13:16 ` Ilpo Järvinen
2022-11-14 2:18 ` Xu Yilun
2022-11-14 12:25 ` Zhang, Tianfei
2022-11-08 14:43 ` [PATCH 11/12] fpga: m10bmc-sec: Add support for N6000 Ilpo Järvinen
2022-11-08 14:43 ` [PATCH 12/12] mfd: intel-m10-bmc: Change MODULE_LICENSE() to GPL Ilpo Järvinen
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