From: Marco Pagani <marpagan@redhat.com>
To: Moritz Fischer <mdf@kernel.org>, Wu Hao <hao.wu@intel.com>,
Xu Yilun <yilun.xu@intel.com>, Tom Rix <trix@redhat.com>
Cc: Marco Pagani <marpagan@redhat.com>,
linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org
Subject: [RFC PATCH 4/4] fpga: add fake FPGA bridge
Date: Fri, 3 Feb 2023 18:06:53 +0100 [thread overview]
Message-ID: <20230203170653.414990-5-marpagan@redhat.com> (raw)
In-Reply-To: <20230203170653.414990-1-marpagan@redhat.com>
Add fake FPGA bridge driver with support functions. The driver includes
a counter for the number of switching cycles. This module is part of
the KUnit test suite for the FPGA subsystem.
Signed-off-by: Marco Pagani <marpagan@redhat.com>
---
drivers/fpga/tests/fake-fpga-bridge.c | 214 ++++++++++++++++++++++++++
drivers/fpga/tests/fake-fpga-bridge.h | 36 +++++
2 files changed, 250 insertions(+)
create mode 100644 drivers/fpga/tests/fake-fpga-bridge.c
create mode 100644 drivers/fpga/tests/fake-fpga-bridge.h
diff --git a/drivers/fpga/tests/fake-fpga-bridge.c b/drivers/fpga/tests/fake-fpga-bridge.c
new file mode 100644
index 000000000000..1f3c8e4fbb6a
--- /dev/null
+++ b/drivers/fpga/tests/fake-fpga-bridge.c
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for fake FPGA bridge
+ *
+ * Copyright (C) 2023 Red Hat, Inc. All rights reserved.
+ *
+ * Author: Marco Pagani <marpagan@redhat.com>
+ */
+
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/fpga/fpga-bridge.h>
+#include <kunit/test.h>
+
+#include "fake-fpga-bridge.h"
+
+#define FAKE_FPGA_BRIDGE_DEV_NAME "fake_fpga_bridge"
+
+struct fake_bridge_priv {
+ int id;
+ bool enable;
+ int cycles_count;
+ struct kunit *test;
+};
+
+struct fake_bridge_data {
+ struct kunit *test;
+};
+
+static int op_enable_show(struct fpga_bridge *bridge)
+{
+ struct fake_bridge_priv *priv;
+
+ priv = bridge->priv;
+
+ if (priv->test)
+ kunit_info(priv->test, "Fake FPGA bridge %d: enable_show\n",
+ priv->id);
+
+ return priv->enable;
+}
+
+static int op_enable_set(struct fpga_bridge *bridge, bool enable)
+{
+ struct fake_bridge_priv *priv;
+
+ priv = bridge->priv;
+
+ if (enable && !priv->enable)
+ priv->cycles_count++;
+
+ priv->enable = enable;
+
+ if (priv->test)
+ kunit_info(priv->test, "Fake FPGA bridge %d: enable_set: %d\n",
+ priv->id, enable);
+
+ return 0;
+}
+
+static void op_remove(struct fpga_bridge *bridge)
+{
+}
+
+static const struct fpga_bridge_ops fake_fpga_bridge_ops = {
+ .enable_show = op_enable_show,
+ .enable_set = op_enable_set,
+ .fpga_bridge_remove = op_remove,
+};
+
+/**
+ * fake_fpga_bridge_register - register a fake FPGA bridge
+ * @bridge_ctx: fake FPGA bridge context data structure.
+ * @test: KUnit test context object.
+ *
+ * Return: 0 if registration succeeded, an error code otherwise.
+ */
+int fake_fpga_bridge_register(struct fake_fpga_bridge *bridge_ctx,
+ struct kunit *test)
+{
+ struct fake_bridge_data pdata;
+ struct fake_bridge_priv *priv;
+ int ret;
+
+ pdata.test = test;
+
+ bridge_ctx->pdev = platform_device_alloc(FAKE_FPGA_BRIDGE_DEV_NAME,
+ PLATFORM_DEVID_AUTO);
+ if (IS_ERR(bridge_ctx->pdev)) {
+ pr_err("Fake FPGA bridge device allocation failed\n");
+ return -ENOMEM;
+ }
+
+ platform_device_add_data(bridge_ctx->pdev, &pdata, sizeof(pdata));
+
+ ret = platform_device_add(bridge_ctx->pdev);
+ if (ret) {
+ pr_err("Fake FPGA bridge device add failed\n");
+ platform_device_put(bridge_ctx->pdev);
+ return ret;
+ }
+
+ bridge_ctx->bridge = platform_get_drvdata(bridge_ctx->pdev);
+
+ if (test) {
+ priv = bridge_ctx->bridge->priv;
+ kunit_info(test, "Fake FPGA bridge %d registered\n", priv->id);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(fake_fpga_bridge_register);
+
+/**
+ * fake_fpga_bridge_unregister - unregister a fake FPGA bridge
+ * @bridge_ctx: fake FPGA bridge context data structure.
+ */
+void fake_fpga_bridge_unregister(struct fake_fpga_bridge *bridge_ctx)
+{
+ struct fake_bridge_priv *priv;
+ struct kunit *test;
+ int id;
+
+ priv = bridge_ctx->bridge->priv;
+ test = priv->test;
+ id = priv->id;
+
+ if (bridge_ctx->pdev) {
+ platform_device_unregister(bridge_ctx->pdev);
+ if (test)
+ kunit_info(test, "Fake FPGA bridge %d unregistered\n", id);
+ }
+}
+EXPORT_SYMBOL_GPL(fake_fpga_bridge_unregister);
+
+/**
+ * fake_fpga_bridge_get_state - get state of a fake FPGA bridge
+ * @bridge_ctx: fake FPGA bridge context data structure.
+ *
+ * Return: 1 if the bridge is enabled, 0 if disabled.
+ */
+int fake_fpga_bridge_get_state(const struct fake_fpga_bridge *bridge_ctx)
+{
+ return bridge_ctx->bridge->br_ops->enable_show(bridge_ctx->bridge);
+}
+EXPORT_SYMBOL_GPL(fake_fpga_bridge_get_state);
+
+/**
+ * fake_fpga_bridge_get_cycles_count - get the number of switching cycles
+ * @bridge_ctx: fake FPGA bridge context data structure.
+ *
+ * Return: number of switching cycles.
+ */
+int fake_fpga_bridge_get_cycles_count(const struct fake_fpga_bridge *bridge_ctx)
+{
+ struct fake_bridge_priv *priv;
+
+ priv = bridge_ctx->bridge->priv;
+
+ return priv->cycles_count;
+}
+EXPORT_SYMBOL_GPL(fake_fpga_bridge_get_cycles_count);
+
+static int fake_fpga_bridge_probe(struct platform_device *pdev)
+{
+ struct device *dev;
+ struct fpga_bridge *bridge;
+ struct fake_bridge_data *pdata;
+ struct fake_bridge_priv *priv;
+ static int id_count;
+
+ dev = &pdev->dev;
+ pdata = dev_get_platdata(dev);
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->id = id_count++;
+ priv->test = pdata->test;
+
+ bridge = fpga_bridge_register(dev, "Fake FPGA Bridge",
+ &fake_fpga_bridge_ops, priv);
+ if (IS_ERR(bridge))
+ return PTR_ERR(bridge);
+
+ platform_set_drvdata(pdev, bridge);
+
+ return 0;
+}
+
+static int fake_fpga_bridge_remove(struct platform_device *pdev)
+{
+ struct fpga_bridge *bridge = platform_get_drvdata(pdev);
+
+ fpga_bridge_unregister(bridge);
+
+ return 0;
+}
+
+static struct platform_driver fake_fpga_bridge_drv = {
+ .driver = {
+ .name = FAKE_FPGA_BRIDGE_DEV_NAME
+ },
+ .probe = fake_fpga_bridge_probe,
+ .remove = fake_fpga_bridge_remove,
+};
+
+module_platform_driver(fake_fpga_bridge_drv);
+
+MODULE_AUTHOR("Marco Pagani <marpagan@redhat.com>");
+MODULE_DESCRIPTION("Fake FPGA Bridge");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/fpga/tests/fake-fpga-bridge.h b/drivers/fpga/tests/fake-fpga-bridge.h
new file mode 100644
index 000000000000..9de62d2f993b
--- /dev/null
+++ b/drivers/fpga/tests/fake-fpga-bridge.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Header file for fake FPGA bridge
+ *
+ * Copyright (C) 2023 Red Hat, Inc. All rights reserved.
+ *
+ * Author: Marco Pagani <marpagan@redhat.com>
+ */
+
+#ifndef __FPGA_FAKE_BRIDGE_H
+#define __FPGA_FAKE_BRIDGE_H
+
+#include <linux/platform_device.h>
+#include <kunit/test.h>
+
+/**
+ * struct fake_fpga_bridge - fake FPGA bridge context data structure
+ *
+ * @bridge: FPGA bridge.
+ * @pdev: platform device of the FPGA bridge.
+ */
+struct fake_fpga_bridge {
+ struct fpga_bridge *bridge;
+ struct platform_device *pdev;
+};
+
+int fake_fpga_bridge_register(struct fake_fpga_bridge *bridge_ctx,
+ struct kunit *test);
+
+void fake_fpga_bridge_unregister(struct fake_fpga_bridge *bridge_ctx);
+
+int fake_fpga_bridge_get_state(const struct fake_fpga_bridge *bridge_ctx);
+
+int fake_fpga_bridge_get_cycles_count(const struct fake_fpga_bridge *bridge_ctx);
+
+#endif /* __FPGA_FAKE_BRIDGE_H */
--
2.39.1
next prev parent reply other threads:[~2023-02-03 17:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 17:06 [RFC PATCH 0/4] fpga: add initial KUnit test suite for the subsystem Marco Pagani
2023-02-03 17:06 ` [RFC PATCH 1/4] fpga: add initial KUnit test suite Marco Pagani
2023-02-07 1:05 ` Russ Weight
2023-02-07 13:28 ` Marco Pagani
2023-02-13 23:37 ` Russ Weight
2023-02-15 11:47 ` Marco Pagani
2023-02-18 9:59 ` Xu Yilun
2023-02-21 11:10 ` Marco Pagani
2023-02-24 6:14 ` Xu Yilun
2023-03-01 10:14 ` Marco Pagani
2023-03-04 15:09 ` Xu Yilun
2023-02-03 17:06 ` [RFC PATCH 2/4] fpga: add fake FPGA region Marco Pagani
2023-02-18 10:13 ` Xu Yilun
2023-02-21 14:53 ` Marco Pagani
2023-02-24 7:20 ` Xu Yilun
2023-03-01 10:51 ` Marco Pagani
2023-03-04 15:24 ` Xu Yilun
2023-02-03 17:06 ` [RFC PATCH 3/4] fpga: add fake FPGA manager Marco Pagani
2023-02-03 17:06 ` Marco Pagani [this message]
2023-02-14 1:20 ` [RFC PATCH 0/4] fpga: add initial KUnit test suite for the subsystem Russ Weight
2023-02-15 11:19 ` Marco Pagani
2023-02-15 16:43 ` Russ Weight
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