From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DDBCC77B73 for ; Thu, 27 Apr 2023 15:09:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243507AbjD0PHU (ORCPT ); Thu, 27 Apr 2023 11:07:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243404AbjD0PHT (ORCPT ); Thu, 27 Apr 2023 11:07:19 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C513E2726; Thu, 27 Apr 2023 08:07:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5FC5863925; Thu, 27 Apr 2023 15:07:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AD476C433EF; Thu, 27 Apr 2023 15:07:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1682608037; bh=ulSYfIm/Xn1w4SJK9Tdg8qvteSnavwAKqwgP2KV+nys=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=umA7rf5axnH/KTHkq7Hwa3KkLBl3zqEU7DEZDeAXcN4AZH2EwTAknJBGiEXKNtrt2 XCHQgb12tgqSsvatcrAKwzk31ZjJFdGE52gvi9S60biI7W9rLaKRdY4+gBdlJaJ8Yh /8lTpFPM9InRu6rGXIucZt76eljc4CBzmscmAh1oVfcCzZjAPnhjswRvkoMs6fiRHk ch9hqCBqneRsL7kSoMfgKkheUOvmLekJg36aPeQtadfceexHSIsyIUNM3g52gIr6Jt 5M8zBz68Sega5dcSGOF1ZRfj5LpRZgoZyD+5IYdxClRala8UNhiis4mzx5jvsLn06G mkCyJMu3K7tyw== Date: Thu, 27 Apr 2023 16:07:12 +0100 From: Lee Jones To: Ilpo =?iso-8859-1?Q?J=E4rvinen?= Cc: Xu Yilun , Wu Hao , Tom Rix , Moritz Fischer , linux-fpga@vger.kernel.org, Jean Delvare , Guenter Roeck , Russ Weight , linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org Subject: Re: [PATCH v3 4/4] mfd: intel-m10-bmc: Manage access to MAX 10 fw handshake registers Message-ID: <20230427150712.GV50521@google.com> References: <20230417092653.16487-1-ilpo.jarvinen@linux.intel.com> <20230417092653.16487-5-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230417092653.16487-5-ilpo.jarvinen@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org On Mon, 17 Apr 2023, Ilpo Järvinen wrote: > On some MAX 10 cards, the BMC firmware is not available to service > handshake registers during secure update erase and write phases at > normal speeds. This problem affects at least hwmon driver. When the MAX > 10 hwmon driver tries to read the sensor values during a secure update, > the reads are slowed down (e.g., reading all D5005 sensors takes ~24s > which is magnitudes worse than the normal <0.02s). > > Manage access to the handshake registers using a rw semaphore and a FW > state variable to prevent accesses during those secure update phases > and return -EBUSY instead. > > If handshake_sys_reg_nranges == 0, don't update bwcfw_state as it is not > used. This avoids the locking cost. > > Co-developed-by: Russ Weight > Signed-off-by: Russ Weight > Co-developed-by: Xu Yilun > Signed-off-by: Xu Yilun > Signed-off-by: Ilpo Järvinen > --- > drivers/fpga/intel-m10-bmc-sec-update.c | 17 +++++-- > drivers/mfd/intel-m10-bmc-core.c | 67 ++++++++++++++++++++++++- > drivers/mfd/intel-m10-bmc-spi.c | 14 ++++++ > include/linux/mfd/intel-m10-bmc.h | 28 +++++++++++ > 4 files changed, 121 insertions(+), 5 deletions(-) Applied, thanks -- Lee Jones [李琼斯]