linux-fpga.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Mahesh Rao <mahesh.rao@intel.com>
Cc: Moritz Fischer <mdf@kernel.org>, Xu Yilun <yilun.xu@intel.com>,
	Tom Rix <trix@redhat.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Wu Hao <hao.wu@intel.com>, Ho Yin <adrian.ho.yin.ng@altera.com>,
	Niravkumar L Rabara <nirav.rabara@altera.com>,
	linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Mahesh Rao <mahesh.rao@altera.com>
Subject: Re: [PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema
Date: Fri, 31 Jan 2025 09:26:36 -0600	[thread overview]
Message-ID: <20250131152636.GA3454395-robh@kernel.org> (raw)
In-Reply-To: <20250131-socfpga_sip_svc_misc-v2-2-eeed4ebc35f9@intel.com>

On Fri, Jan 31, 2025 at 06:17:25PM +0800, Mahesh Rao wrote:
> Convert intel,stratix10-svc service layer devicetree
> binding file from freeform format to json-schema.
> 
> Also added DT binding for optional stratix10-soc
> FPGA manager child node.
> 
> Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
> ---
>  .../bindings/firmware/intel,stratix10-svc.txt      | 57 -------------
>  .../bindings/firmware/intel,stratix10-svc.yaml     | 94 ++++++++++++++++++++++
>  2 files changed, 94 insertions(+), 57 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> deleted file mode 100644
> index 6eff1afd8daf91714d6a18859667d2607e707da7..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -Intel Service Layer Driver for Stratix10 SoC
> -============================================
> -Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> -processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> -configured from HPS, there needs to be a way for HPS to notify SDM the
> -location and size of the configuration data. Then SDM will get the
> -configuration data from that location and perform the FPGA configuration.
> -
> -To meet the whole system security needs and support virtual machine requesting
> -communication with SDM, only the secure world of software (EL3, Exception
> -Layer 3) can interface with SDM. All software entities running on other
> -exception layers must channel through the EL3 software whenever it needs
> -service from SDM.
> -
> -Intel Stratix10 service layer driver, running at privileged exception level
> -(EL1, Exception Layer 1), interfaces with the service providers and provides
> -the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> -driver also manages secure monitor call (SMC) to communicate with secure monitor
> -code running in EL3.
> -
> -Required properties:
> --------------------
> -The svc node has the following mandatory properties, must be located under
> -the firmware node.
> -
> -- compatible: "intel,stratix10-svc" or "intel,agilex-svc"
> -- method: smc or hvc
> -        smc - Secure Monitor Call
> -        hvc - Hypervisor Call
> -- memory-region:
> -	phandle to the reserved memory node. See
> -	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
> -	for details
> -
> -Example:
> --------
> -
> -	reserved-memory {
> -                #address-cells = <2>;
> -                #size-cells = <2>;
> -                ranges;
> -
> -                service_reserved: svcbuffer@0 {
> -                        compatible = "shared-dma-pool";
> -                        reg = <0x0 0x0 0x0 0x1000000>;
> -                        alignment = <0x1000>;
> -                        no-map;
> -                };
> -        };
> -
> -	firmware {
> -		svc {
> -			compatible = "intel,stratix10-svc";
> -			method = "smc";
> -			memory-region = <&service_reserved>;
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..e30e79d4c3150f90993e728320e9ef90d484a10d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Service Layer Driver for Stratix10 SoC
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@kernel.org>
> +  - Mahesh Rao <mahesh.rao@altera.com>
> +
> +description:

You need '>' on the end to preserve paragraphs.

> +  Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> +  processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> +  configured from HPS, there needs to be a way for HPS to notify SDM the
> +  location and size of the configuration data. Then SDM will get the
> +  configuration data from that location and perform the FPGA configuration.
> +
> +  To meet the whole system security needs and support virtual machine requesting
> +  communication with SDM, only the secure world of software (EL3, Exception
> +  Layer 3) can interface with SDM. All software entities running on other
> +  exception layers must channel through the EL3 software whenever it needs
> +  service from SDM.
> +
> +  Intel Stratix10 service layer driver, running at privileged exception level
> +  (EL1, Exception Layer 1), interfaces with the service providers and provides
> +  the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> +  driver also manages secure monitor call (SMC) to communicate with secure monitor
> +  code running in EL3.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - intel,stratix10-svc
> +      - intel,agilex-svc
> +
> +  method:
> +    description: |
> +                 Supervisory call method to be used to communicate with the
> +                 secure service layer.
> +                 Permitted values are:
> +                 - "smc" : SMC #0, following the SMCCC
> +                 - "hvc" : HVC #0, following the SMCCC

Indent by 2 more than 'description'.

> +
> +    $ref: /schemas/types.yaml#/definitions/string-array
> +    enum:
> +      - smc
> +      - hvc
> +
> +  memory-region:
> +    maxItems: 1
> +    description:
> +      phandle to a reserved memory region for the service layer driver to
> +      communicate with the secure device manager. For more details see
> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.

Please read what that file says.

> +
> +  fpga-mgr:
> +    $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
> +    description: Optional child node for fpga manager to perform fabric configuration.
> +
> +required:
> +  - compatible
> +  - method
> +  - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    reserved-memory {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +
> +      service_reserved: svcbuffer@0 {
> +              compatible = "shared-dma-pool";
> +              reg = <0x0 0x0 0x0 0x1000000>;
> +              alignment = <0x1000>;
> +              no-map;
> +      };
> +    };
> +
> +    firmware {
> +      svc {
> +        compatible = "intel,stratix10-svc";
> +        method = "smc";
> +        memory-region = <&service_reserved>;
> +
> +        fpga-mgr {
> +          compatible = "intel,stratix10-soc-fpga-mgr";
> +        };
> +      };
> +    };
> +
> 
> -- 
> 2.35.3
> 

  reply	other threads:[~2025-01-31 15:26 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-31 10:17 [PATCH v2 0/3] stratix10: miscellaneous changes and fix for child driver probing Mahesh Rao
2025-01-31 10:17 ` [PATCH v2 1/3] dt-bindings: fpga: stratix10: Convert to json-schema Mahesh Rao
2025-01-31 15:22   ` Rob Herring (Arm)
2025-01-31 10:17 ` [PATCH v2 2/3] dt-bindings: firmware: " Mahesh Rao
2025-01-31 15:26   ` Rob Herring [this message]
2025-02-03 10:42     ` Mahesh Rao
2025-02-03 11:15       ` Krzysztof Kozlowski
2025-02-03 11:22         ` Mahesh Rao
2025-01-31 10:17 ` [PATCH v2 3/3] firmware: stratix10-svc: Add of_platform_default_populate() Mahesh Rao
2025-01-31 10:26   ` Krzysztof Kozlowski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250131152636.GA3454395-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=adrian.ho.yin.ng@altera.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=hao.wu@intel.com \
    --cc=krzk+dt@kernel.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-fpga@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mahesh.rao@altera.com \
    --cc=mahesh.rao@intel.com \
    --cc=mdf@kernel.org \
    --cc=nirav.rabara@altera.com \
    --cc=trix@redhat.com \
    --cc=yilun.xu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).