From: "Nuno Sá via B4 Relay" <devnull+nuno.sa.analog.com@kernel.org>
To: linux-clk@vger.kernel.org, linux-fpga@vger.kernel.org,
dmaengine@vger.kernel.org, linux-hwmon@vger.kernel.org,
linux-iio@vger.kernel.org, linux-pwm@vger.kernel.org,
linux-spi@vger.kernel.org
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Moritz Fischer" <mdf@kernel.org>, "Wu Hao" <hao.wu@intel.com>,
"Xu Yilun" <yilun.xu@intel.com>, "Tom Rix" <trix@redhat.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Jean Delvare" <jdelvare@suse.com>,
"Guenter Roeck" <linux@roeck-us.net>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"Trevor Gamblin" <tgamblin@baylibre.com>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Mark Brown" <broonie@kernel.org>,
"Mike Turquette" <mturquette@linaro.org>
Subject: [PATCH v6 4/7] include: adi-axi-common: add new helper macros
Date: Mon, 19 May 2025 16:41:09 +0100 [thread overview]
Message-ID: <20250519-dev-axi-clkgen-limits-v6-4-bc4b3b61d1d4@analog.com> (raw)
In-Reply-To: <20250519-dev-axi-clkgen-limits-v6-0-bc4b3b61d1d4@analog.com>
From: Nuno Sá <nuno.sa@analog.com>
Add new helper macros and enums to help identifying the platform and some
characteristics of it at runtime.
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
include/linux/adi-axi-common.h | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/include/linux/adi-axi-common.h b/include/linux/adi-axi-common.h
index 141ac3f251e6f256526812b9d55cd440a2a46e76..f64f4ad4bedae312ec450bd5fed09ceaedd5397e 100644
--- a/include/linux/adi-axi-common.h
+++ b/include/linux/adi-axi-common.h
@@ -12,6 +12,7 @@
#define ADI_AXI_COMMON_H_
#define ADI_AXI_REG_VERSION 0x0000
+#define ADI_AXI_REG_FPGA_INFO 0x001C
#define ADI_AXI_PCORE_VER(major, minor, patch) \
(((major) << 16) | ((minor) << 8) | (patch))
@@ -20,4 +21,36 @@
#define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff)
#define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff)
+#define ADI_AXI_INFO_FPGA_TECH(info) (((info) >> 24) & 0xff)
+#define ADI_AXI_INFO_FPGA_FAMILY(info) (((info) >> 16) & 0xff)
+#define ADI_AXI_INFO_FPGA_SPEED_GRADE(info) (((info) >> 8) & 0xff)
+
+enum adi_axi_fpga_technology {
+ ADI_AXI_FPGA_TECH_UNKNOWN = 0,
+ ADI_AXI_FPGA_TECH_SERIES7,
+ ADI_AXI_FPGA_TECH_ULTRASCALE,
+ ADI_AXI_FPGA_TECH_ULTRASCALE_PLUS,
+};
+
+enum adi_axi_fpga_family {
+ ADI_AXI_FPGA_FAMILY_UNKNOWN = 0,
+ ADI_AXI_FPGA_FAMILY_ARTIX,
+ ADI_AXI_FPGA_FAMILY_KINTEX,
+ ADI_AXI_FPGA_FAMILY_VIRTEX,
+ ADI_AXI_FPGA_FAMILY_ZYNQ,
+};
+
+enum adi_axi_fpga_speed_grade {
+ ADI_AXI_FPGA_SPEED_UNKNOWN = 0,
+ ADI_AXI_FPGA_SPEED_1 = 10,
+ ADI_AXI_FPGA_SPEED_1L = 11,
+ ADI_AXI_FPGA_SPEED_1H = 12,
+ ADI_AXI_FPGA_SPEED_1HV = 13,
+ ADI_AXI_FPGA_SPEED_1LV = 14,
+ ADI_AXI_FPGA_SPEED_2 = 20,
+ ADI_AXI_FPGA_SPEED_2L = 21,
+ ADI_AXI_FPGA_SPEED_2LV = 22,
+ ADI_AXI_FPGA_SPEED_3 = 30,
+};
+
#endif /* ADI_AXI_COMMON_H_ */
--
2.49.0
next prev parent reply other threads:[~2025-05-19 15:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-19 15:41 [PATCH v6 0/7] clk: clk-axi-clkgen: improvements and some fixes Nuno Sá via B4 Relay
2025-05-19 15:41 ` [PATCH v6 1/7] clk: clk-axi-clkgen: fix fpfd_max frequency for zynq Nuno Sá via B4 Relay
2025-07-01 0:58 ` Stephen Boyd
2025-05-19 15:41 ` [PATCH v6 2/7] clk: clk-axi-clkgen: make sure to include mod_devicetable.h Nuno Sá via B4 Relay
2025-07-01 0:58 ` Stephen Boyd
2025-05-19 15:41 ` [PATCH v6 3/7] include: linux: move adi-axi-common.h out of fpga Nuno Sá via B4 Relay
2025-05-19 15:57 ` Mark Brown
2025-05-19 16:28 ` Uwe Kleine-König
2025-07-01 0:58 ` Stephen Boyd
2025-05-19 15:41 ` Nuno Sá via B4 Relay [this message]
2025-07-01 0:59 ` [PATCH v6 4/7] include: adi-axi-common: add new helper macros Stephen Boyd
2025-05-19 15:41 ` [PATCH v6 5/7] clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime Nuno Sá via B4 Relay
2025-07-01 0:59 ` Stephen Boyd
2025-05-19 15:41 ` [PATCH v6 6/7] clk: clk-axi-clkgen move to min/max() Nuno Sá via B4 Relay
2025-07-01 0:59 ` Stephen Boyd
2025-05-19 15:41 ` [PATCH v6 7/7] clk: clk-axi-clkgen: fix coding style issues Nuno Sá via B4 Relay
2025-07-01 0:59 ` Stephen Boyd
2025-05-19 15:57 ` [PATCH v6 0/7] clk: clk-axi-clkgen: improvements and some fixes David Lechner
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