From: Jason Gunthorpe <jgg@nvidia.com>
To: Xu Yilun <yilun.xu@linux.intel.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
Pavel Pisa <pisa@fel.cvut.cz>,
linux-fpga@vger.kernel.org, Michal Simek <michal.simek@amd.com>,
Xu Yilun <yilun.xu@intel.com>,
Pavel Hronek <hronepa1@fel.cvut.cz>,
Jiri Novak <jnovak@fel.cvut.cz>,
Ondrej Ille <ondrej.ille@gmail.com>
Subject: Re: AMD/Xilinx Zynq FPGA manager stopped to work after 6.16.0-g283564a43383
Date: Tue, 5 Aug 2025 15:52:35 -0300 [thread overview]
Message-ID: <20250805185235.GP184255@nvidia.com> (raw)
In-Reply-To: <aJI7juhONZp/8XfI@yilunxu-OptiPlex-7050>
On Wed, Aug 06, 2025 at 01:12:46AM +0800, Xu Yilun wrote:
> @@ -405,12 +405,12 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, struct sg_table *sgt)
> }
> }
>
> - priv->dma_nelms =
> - dma_map_sgtable(mgr->dev.parent, sgt, DMA_TO_DEVICE, 0);
> - if (priv->dma_nelms == 0) {
> + err = dma_map_sgtable(mgr->dev.parent, sgt, DMA_TO_DEVICE, 0);
> + if (err) {
> dev_err(&mgr->dev, "Unable to DMA map (TO_DEVICE)\n");
> - return -ENOMEM;
> + return err;
> }
> + priv->dma_nelms = sgt->nents;
That looks pretty good, Marek is certainly right the original had a
bug.
Jason
next prev parent reply other threads:[~2025-08-05 18:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250804134826eucas1p1350956e17ae463332a69eaa67dc2f8d7@eucas1p1.samsung.com>
2025-08-04 13:48 ` AMD/Xilinx Zynq FPGA manager stopped to work after 6.16.0-g283564a43383 Pavel Pisa
2025-08-05 10:01 ` Marek Szyprowski
2025-08-05 17:12 ` Xu Yilun
2025-08-05 18:52 ` Jason Gunthorpe [this message]
2025-08-05 19:39 ` Pavel Pisa
2025-08-06 7:11 ` Xu Yilun
2025-08-06 5:22 ` Marek Szyprowski
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