* [PATCH] dt-bindings: fpga: update link for Altera's and AMD partial recon
@ 2025-11-01 19:08 Dinh Nguyen
2025-11-02 16:41 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Dinh Nguyen @ 2025-11-01 19:08 UTC (permalink / raw)
To: devicetree
Cc: dinguyen, linux-fpga, yilun.xu, trix, robh+dt,
krzysztof.kozlowskii+dt, conor+dt, michal.simek
The link is giving the 404 error, so use the correct link for the
documents
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
Documentation/devicetree/bindings/fpga/fpga-region.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.yaml b/Documentation/devicetree/bindings/fpga/fpga-region.yaml
index 7d2d3b7aa4b7..98e7c311c0c8 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.yaml
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.yaml
@@ -215,9 +215,9 @@ description: |
FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration.
--
- [1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf
+ [1] https://www.intel.com/programmable/technical-pdfs/683404.pdf
[2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf
- [3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf
+ [3] https://docs.amd.com/v/u/en-US/ug702
properties:
$nodename:
--
2.42.0.411.g813d9a9188
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: fpga: update link for Altera's and AMD partial recon
2025-11-01 19:08 [PATCH] dt-bindings: fpga: update link for Altera's and AMD partial recon Dinh Nguyen
@ 2025-11-02 16:41 ` Krzysztof Kozlowski
2025-11-03 14:46 ` Xu Yilun
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-11-02 16:41 UTC (permalink / raw)
To: Dinh Nguyen
Cc: devicetree, linux-fpga, yilun.xu, trix, robh+dt,
krzysztof.kozlowskii+dt, conor+dt, michal.simek
On Sat, Nov 01, 2025 at 02:08:48PM -0500, Dinh Nguyen wrote:
> The link is giving the 404 error, so use the correct link for the
> documents
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> Documentation/devicetree/bindings/fpga/fpga-region.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: fpga: update link for Altera's and AMD partial recon
2025-11-02 16:41 ` Krzysztof Kozlowski
@ 2025-11-03 14:46 ` Xu Yilun
0 siblings, 0 replies; 3+ messages in thread
From: Xu Yilun @ 2025-11-03 14:46 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Dinh Nguyen, devicetree, linux-fpga, yilun.xu, trix, robh+dt,
krzysztof.kozlowskii+dt, conor+dt, michal.simek
On Sun, Nov 02, 2025 at 05:41:54PM +0100, Krzysztof Kozlowski wrote:
> On Sat, Nov 01, 2025 at 02:08:48PM -0500, Dinh Nguyen wrote:
> > The link is giving the 404 error, so use the correct link for the
> > documents
> >
> > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> > ---
> > Documentation/devicetree/bindings/fpga/fpga-region.yaml | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Xu Yilun <yilun.xu@linux.intel.com>
Applied to for-next, thank.
>
> Best regards,
> Krzysztof
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-11-01 19:08 [PATCH] dt-bindings: fpga: update link for Altera's and AMD partial recon Dinh Nguyen
2025-11-02 16:41 ` Krzysztof Kozlowski
2025-11-03 14:46 ` Xu Yilun
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