From: Conor Dooley <conor@kernel.org>
To: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Cc: Moritz Fischer <mdf@kernel.org>, Xu Yilun <yilun.xu@intel.com>,
Tom Rix <trix@redhat.com>, Dinh Nguyen <dinguyen@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mahesh Rao <mahesh.rao@altera.com>,
Ho Yin <adrian.ho.yin.ng@altera.com>,
Niravkumar L Rabara <nirav.rabara@altera.com>,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v6 1/2] dt-bindings: fpga: stratix10: add support for Agilex5
Date: Wed, 19 Nov 2025 18:36:20 +0000 [thread overview]
Message-ID: <20251119-surfer-festival-da76a38dbec0@spud> (raw)
In-Reply-To: <2092d4572e9772a30e8f50cb39d066c1c2b2cad9.1763518321.git.khairul.anuar.romli@altera.com>
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On Wed, Nov 19, 2025 at 10:26:05AM +0800, Khairul Anuar Romli wrote:
> Agilex5 introduces changes in how reserved memory is mapped and accessed
> compared to previous SoC generations. Agilex5 compatible allows stratix10-
> FPGA manager driver to handle these changes.
>
> Fallback is added for driver probe and init that rely on matching of table
> and DT node.
>
> Reviewed-by: Xu Yilun <yilun.xu@intel.com>
> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
\x02
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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next prev parent reply other threads:[~2025-11-19 18:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-19 2:26 [PATCH v6 0/2] Enable FPGA Manager support for Agilex5 Khairul Anuar Romli
2025-11-19 2:26 ` [PATCH v6 1/2] dt-bindings: fpga: stratix10: add " Khairul Anuar Romli
2025-11-19 18:36 ` Conor Dooley [this message]
2025-11-19 2:26 ` [PATCH v6 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes Khairul Anuar Romli
2025-11-20 3:08 ` [PATCH v6 0/2] Enable FPGA Manager support for Agilex5 Dinh Nguyen
2025-11-20 3:17 ` Romli, Khairul Anuar
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