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From: "Nuno Sá" <noname.nuno@gmail.com>
To: nuno.sa@analog.com, linux-clk@vger.kernel.org,
	linux-fpga@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	 Moritz Fischer	 <mdf@kernel.org>, Wu Hao <hao.wu@intel.com>,
	Xu Yilun <yilun.xu@intel.com>,  Tom Rix <trix@redhat.com>
Subject: Re: [PATCH RESEND v3 0/6] clk: clk-axi-clkgen: improvements and some fixes
Date: Tue, 22 Apr 2025 09:53:13 +0100	[thread overview]
Message-ID: <3d329a888567432e73b25f264342a281d60182ee.camel@gmail.com> (raw)
In-Reply-To: <20250421-dev-axi-clkgen-limits-v3-0-4203b4fed2c9@analog.com>

On Mon, 2025-04-21 at 15:58 +0100, Nuno Sá via B4 Relay wrote:
> This series starts with a small fix and then a bunch of small
> improvements. The main change though is to allow detecting of
> struct axi_clkgen_limits during probe().
> 
> ---
> Changes in v4:
> - EDITME: describe what is new in this series revision.
> - EDITME: use bulletpoints and terse descriptions.
> - Link to v3:
> https://lore.kernel.org/r/20250407-dev-axi-clkgen-limits-v3-0-33c7f27c9d69@analog.com
> 

Disregard the above please... Messed up with b4

- Nuno Sá

> Changes in v3:
> - Patch 6:
>     * Revert change and parenthesis back on 'if (((params->edge == 0) ^
>       (frac_divider == 1))'. While checkpatch complains, it's more
>       readable like this and in some configs we might even get -Wparentheses.
> - Link to v2:
> https://lore.kernel.org/r/20250313-dev-axi-clkgen-limits-v2-0-173ae2ad6311@analog.com
> 
> Changes in v2:
> - Patch 3
>    * Rename adi_axi_fgpa_technology -> adi_axi_fpga_technology.
> 
> - Link to v1:
> https://lore.kernel.org/r/20250219-dev-axi-clkgen-limits-v1-0-26f7ef14cd9c@analog.com
> 
> ---
> Nuno Sá (6):
>       clk: clk-axi-clkgen: fix fpfd_max frequency for zynq
>       clk: clk-axi-clkgen: make sure to include mod_devicetable.h
>       include: fpga: adi-axi-common: add new helper macros
>       clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime
>       clk: clk-axi-clkgen move to min/max()
>       clk: clk-axi-clkgen: fix coding style issues
> 
>  drivers/clk/clk-axi-clkgen.c        | 147 +++++++++++++++++++++++++----------
> -
>  include/linux/fpga/adi-axi-common.h |  35 +++++++++
>  2 files changed, 140 insertions(+), 42 deletions(-)
> ---
> base-commit: 82f69876ef45ad66c0b114b786c7c6ac0f6a4580
> change-id: 20250218-dev-axi-clkgen-limits-63fb0c5ec38b
> --
> 
> Thanks!
> - Nuno Sá
> 

      parent reply	other threads:[~2025-04-22  8:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-21 14:58 [PATCH RESEND v3 0/6] clk: clk-axi-clkgen: improvements and some fixes Nuno Sá via B4 Relay
2025-04-21 14:58 ` [PATCH RESEND v3 1/6] clk: clk-axi-clkgen: fix fpfd_max frequency for zynq Nuno Sá via B4 Relay
2025-04-21 14:58 ` [PATCH RESEND v3 2/6] clk: clk-axi-clkgen: make sure to include mod_devicetable.h Nuno Sá via B4 Relay
2025-04-21 14:58 ` [PATCH RESEND v3 3/6] include: fpga: adi-axi-common: add new helper macros Nuno Sá via B4 Relay
2025-04-24 10:16   ` Xu Yilun
2025-04-28  9:02     ` Nuno Sá
2025-04-21 14:58 ` [PATCH RESEND v3 4/6] clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime Nuno Sá via B4 Relay
2025-04-21 14:58 ` [PATCH RESEND v3 5/6] clk: clk-axi-clkgen move to min/max() Nuno Sá via B4 Relay
2025-04-21 14:58 ` [PATCH RESEND v3 6/6] clk: clk-axi-clkgen: fix coding style issues Nuno Sá via B4 Relay
2025-04-22  8:53 ` Nuno Sá [this message]

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