[PATCH v2 0/3] stratix10: miscellaneous changes and fix for child driver probing

[PATCH v2 0/3] stratix10: miscellaneous changes and fix for child driver probing

[Mahesh Rao]

The patch set includes the following changes:

- Conversion of the devicetree binding file to JSON-schema for the Stratix10
  SVC driver and its child stratix10 fpga manager driver.
- Addition of support for probing the child driver. This fixes the failure
  of child driver probing as the SVC driver node has been moved out of the
  SoC node.

Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
---
Changes in v2:
  * Added brief description on stratix10 soc fpga manager
    in the binding files.
  * method property in stratix10-svc binding file was
    changed to array of strings.
  * Updated/fixed the usage of of_platform_depopulate()
    in the stratix10-svc driver.

- Link to v1: https://lore.kernel.org/r/20250122-socfpga_sip_svc_misc-v1-0-cbdcd034ae34@intel.com

---
Mahesh Rao (3):
      dt-bindings: fpga: stratix10: Convert to json-schema
      dt-bindings: firmware: stratix10: Convert to json-schema
      firmware: stratix10-svc: Add of_platform_default_populate()

 .../bindings/firmware/intel,stratix10-svc.txt      | 57 -------------
 .../bindings/firmware/intel,stratix10-svc.yaml     | 94 ++++++++++++++++++++++
 .../fpga/intel,stratix10-soc-fpga-mgr.yaml         | 36 +++++++++
 .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 -----
 drivers/firmware/stratix10-svc.c                   | 14 +++-
 5 files changed, 141 insertions(+), 78 deletions(-)
---
base-commit: ffd294d346d185b70e28b1a28abe367bbfe53c04
change-id: 20250109-socfpga_sip_svc_misc-bbcdfb7a0028

Best regards,
-- 
Mahesh Rao <mahesh.rao@intel.com>

[PATCH v2 1/3] dt-bindings: fpga: stratix10: Convert to json-schema

[Mahesh Rao]

Convert intel,stratix10-soc fpga manager devicetree
binding file from freeform format to json-schema.

Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
---
 .../fpga/intel,stratix10-soc-fpga-mgr.yaml         | 36 ++++++++++++++++++++++
 .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 -----------
 2 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..6e536d6b28a9732c492da5d57f89df648dba7f4b
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Stratix10 SoC FPGA Manager
+
+maintainers:
+  - Mahesh Rao <mahesh.rao@altera.com>
+  - Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
+  - Niravkumar L Rabara <nirav.rabara@altera.com>
+
+description:
+  The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard
+  processor system (HPS) and a Secure Device Manager (SDM). The Stratix10
+  SoC FPGA Manager driver is used to configure/reconfigure the FPGA fabric
+  on the die.The driver communicates with SDM/ATF via the stratix10-svc
+  platform driver for performing its operations.
+
+properties:
+  compatible:
+    enum:
+      - intel,stratix10-soc-fpga-mgr
+      - intel,agilex-soc-fpga-mgr
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    fpga-mgr {
+      compatible = "intel,stratix10-soc-fpga-mgr";
+    };
diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
deleted file mode 100644
index 0f874137ca4697820341b23eddb882634bb131d1..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Intel Stratix10 SoC FPGA Manager
-
-Required properties:
-The fpga_mgr node has the following mandatory property, must be located under
-firmware/svc node.
-
-- compatible : should contain "intel,stratix10-soc-fpga-mgr" or
-	       "intel,agilex-soc-fpga-mgr"
-
-Example:
-
-	firmware {
-		svc {
-			fpga_mgr: fpga-mgr {
-				compatible = "intel,stratix10-soc-fpga-mgr";
-			};
-		};
-	};

-- 
2.35.3

[PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema

[Mahesh Rao]

Convert intel,stratix10-svc service layer devicetree
binding file from freeform format to json-schema.

Also added DT binding for optional stratix10-soc
FPGA manager child node.

Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
---
 .../bindings/firmware/intel,stratix10-svc.txt      | 57 -------------
 .../bindings/firmware/intel,stratix10-svc.yaml     | 94 ++++++++++++++++++++++
 2 files changed, 94 insertions(+), 57 deletions(-)

diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
deleted file mode 100644
index 6eff1afd8daf91714d6a18859667d2607e707da7..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Intel Service Layer Driver for Stratix10 SoC
-============================================
-Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
-processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
-configured from HPS, there needs to be a way for HPS to notify SDM the
-location and size of the configuration data. Then SDM will get the
-configuration data from that location and perform the FPGA configuration.
-
-To meet the whole system security needs and support virtual machine requesting
-communication with SDM, only the secure world of software (EL3, Exception
-Layer 3) can interface with SDM. All software entities running on other
-exception layers must channel through the EL3 software whenever it needs
-service from SDM.
-
-Intel Stratix10 service layer driver, running at privileged exception level
-(EL1, Exception Layer 1), interfaces with the service providers and provides
-the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
-driver also manages secure monitor call (SMC) to communicate with secure monitor
-code running in EL3.
-
-Required properties:
--------------------
-The svc node has the following mandatory properties, must be located under
-the firmware node.
-
-- compatible: "intel,stratix10-svc" or "intel,agilex-svc"
-- method: smc or hvc
-        smc - Secure Monitor Call
-        hvc - Hypervisor Call
-- memory-region:
-	phandle to the reserved memory node. See
-	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
-	for details
-
-Example:
--------
-
-	reserved-memory {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                ranges;
-
-                service_reserved: svcbuffer@0 {
-                        compatible = "shared-dma-pool";
-                        reg = <0x0 0x0 0x0 0x1000000>;
-                        alignment = <0x1000>;
-                        no-map;
-                };
-        };
-
-	firmware {
-		svc {
-			compatible = "intel,stratix10-svc";
-			method = "smc";
-			memory-region = <&service_reserved>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..e30e79d4c3150f90993e728320e9ef90d484a10d
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
@@ -0,0 +1,94 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Service Layer Driver for Stratix10 SoC
+
+maintainers:
+  - Dinh Nguyen <dinguyen@kernel.org>
+  - Mahesh Rao <mahesh.rao@altera.com>
+
+description:
+  Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
+  processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
+  configured from HPS, there needs to be a way for HPS to notify SDM the
+  location and size of the configuration data. Then SDM will get the
+  configuration data from that location and perform the FPGA configuration.
+
+  To meet the whole system security needs and support virtual machine requesting
+  communication with SDM, only the secure world of software (EL3, Exception
+  Layer 3) can interface with SDM. All software entities running on other
+  exception layers must channel through the EL3 software whenever it needs
+  service from SDM.
+
+  Intel Stratix10 service layer driver, running at privileged exception level
+  (EL1, Exception Layer 1), interfaces with the service providers and provides
+  the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
+  driver also manages secure monitor call (SMC) to communicate with secure monitor
+  code running in EL3.
+
+properties:
+  compatible:
+    enum:
+      - intel,stratix10-svc
+      - intel,agilex-svc
+
+  method:
+    description: |
+                 Supervisory call method to be used to communicate with the
+                 secure service layer.
+                 Permitted values are:
+                 - "smc" : SMC #0, following the SMCCC
+                 - "hvc" : HVC #0, following the SMCCC
+
+    $ref: /schemas/types.yaml#/definitions/string-array
+    enum:
+      - smc
+      - hvc
+
+  memory-region:
+    maxItems: 1
+    description:
+      phandle to a reserved memory region for the service layer driver to
+      communicate with the secure device manager. For more details see
+      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
+
+  fpga-mgr:
+    $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
+    description: Optional child node for fpga manager to perform fabric configuration.
+
+required:
+  - compatible
+  - method
+  - memory-region
+
+additionalProperties: false
+
+examples:
+  - |
+    reserved-memory {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      service_reserved: svcbuffer@0 {
+              compatible = "shared-dma-pool";
+              reg = <0x0 0x0 0x0 0x1000000>;
+              alignment = <0x1000>;
+              no-map;
+      };
+    };
+
+    firmware {
+      svc {
+        compatible = "intel,stratix10-svc";
+        method = "smc";
+        memory-region = <&service_reserved>;
+
+        fpga-mgr {
+          compatible = "intel,stratix10-soc-fpga-mgr";
+        };
+      };
+    };
+

-- 
2.35.3

[PATCH v2 3/3] firmware: stratix10-svc: Add of_platform_default_populate()

[Mahesh Rao]

Add of_platform_default_populate() to stratix10-svc
driver as the firmware/svc node was moved out of soc.
This fixes the failed probing of child drivers of
svc node.

Fixes: 23c3ebed382a ("arm64: dts: socfpga: agilex: move firmware out of soc node")
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
---
 drivers/firmware/stratix10-svc.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c
index c5c78b869561b0c1e9602823ad1f501e98e3ce51..6a0419197c9ed2f2ccfc4643baba70340d0934f2 100644
--- a/drivers/firmware/stratix10-svc.c
+++ b/drivers/firmware/stratix10-svc.c
@@ -1227,22 +1227,28 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
 	if (!svc->intel_svc_fcs) {
 		dev_err(dev, "failed to allocate %s device\n", INTEL_FCS);
 		ret = -ENOMEM;
-		goto err_unregister_dev;
+		goto err_unregister_rsu_dev;
 	}
 
 	ret = platform_device_add(svc->intel_svc_fcs);
 	if (ret) {
 		platform_device_put(svc->intel_svc_fcs);
-		goto err_unregister_dev;
+		goto err_unregister_rsu_dev;
 	}
 
+	ret = of_platform_default_populate(dev_of_node(dev), NULL, dev);
+	if (ret)
+		goto err_unregister_fcs_dev;
+
 	dev_set_drvdata(dev, svc);
 
 	pr_info("Intel Service Layer Driver Initialized\n");
 
 	return 0;
 
-err_unregister_dev:
+err_unregister_fcs_dev:
+	platform_device_unregister(svc->intel_svc_fcs);
+err_unregister_rsu_dev:
 	platform_device_unregister(svc->stratix10_svc_rsu);
 err_free_kfifo:
 	kfifo_free(&controller->svc_fifo);
@@ -1256,6 +1262,8 @@ static void stratix10_svc_drv_remove(struct platform_device *pdev)
 	struct stratix10_svc *svc = dev_get_drvdata(&pdev->dev);
 	struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
 
+	of_platform_depopulate(ctrl->dev);
+
 	platform_device_unregister(svc->intel_svc_fcs);
 	platform_device_unregister(svc->stratix10_svc_rsu);
 

-- 
2.35.3

Re: [PATCH v2 3/3] firmware: stratix10-svc: Add of_platform_default_populate()

[Krzysztof Kozlowski]

On 31/01/2025 11:17, Mahesh Rao wrote:
>  
> -err_unregister_dev:
> +err_unregister_fcs_dev:
> +	platform_device_unregister(svc->intel_svc_fcs);
> +err_unregister_rsu_dev:
>  	platform_device_unregister(svc->stratix10_svc_rsu);
>  err_free_kfifo:
>  	kfifo_free(&controller->svc_fifo);
> @@ -1256,6 +1262,8 @@ static void stratix10_svc_drv_remove(struct platform_device *pdev)
>  	struct stratix10_svc *svc = dev_get_drvdata(&pdev->dev);
>  	struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
>  
> +	of_platform_depopulate(ctrl->dev);


I thought you will use devm for this, but well...

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v2 1/3] dt-bindings: fpga: stratix10: Convert to json-schema

[Rob Herring (Arm)]

On Fri, 31 Jan 2025 18:17:24 +0800, Mahesh Rao wrote:
> Convert intel,stratix10-soc fpga manager devicetree
> binding file from freeform format to json-schema.
> 
> Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
> ---
>  .../fpga/intel,stratix10-soc-fpga-mgr.yaml         | 36 ++++++++++++++++++++++
>  .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 -----------
>  2 files changed, 36 insertions(+), 18 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema

[Rob Herring]

On Fri, Jan 31, 2025 at 06:17:25PM +0800, Mahesh Rao wrote:
> Convert intel,stratix10-svc service layer devicetree
> binding file from freeform format to json-schema.
> 
> Also added DT binding for optional stratix10-soc
> FPGA manager child node.
> 
> Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
> ---
>  .../bindings/firmware/intel,stratix10-svc.txt      | 57 -------------
>  .../bindings/firmware/intel,stratix10-svc.yaml     | 94 ++++++++++++++++++++++
>  2 files changed, 94 insertions(+), 57 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> deleted file mode 100644
> index 6eff1afd8daf91714d6a18859667d2607e707da7..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -Intel Service Layer Driver for Stratix10 SoC
> -============================================
> -Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> -processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> -configured from HPS, there needs to be a way for HPS to notify SDM the
> -location and size of the configuration data. Then SDM will get the
> -configuration data from that location and perform the FPGA configuration.
> -
> -To meet the whole system security needs and support virtual machine requesting
> -communication with SDM, only the secure world of software (EL3, Exception
> -Layer 3) can interface with SDM. All software entities running on other
> -exception layers must channel through the EL3 software whenever it needs
> -service from SDM.
> -
> -Intel Stratix10 service layer driver, running at privileged exception level
> -(EL1, Exception Layer 1), interfaces with the service providers and provides
> -the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> -driver also manages secure monitor call (SMC) to communicate with secure monitor
> -code running in EL3.
> -
> -Required properties:
> --------------------
> -The svc node has the following mandatory properties, must be located under
> -the firmware node.
> -
> -- compatible: "intel,stratix10-svc" or "intel,agilex-svc"
> -- method: smc or hvc
> -        smc - Secure Monitor Call
> -        hvc - Hypervisor Call
> -- memory-region:
> -	phandle to the reserved memory node. See
> -	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
> -	for details
> -
> -Example:
> --------
> -
> -	reserved-memory {
> -                #address-cells = <2>;
> -                #size-cells = <2>;
> -                ranges;
> -
> -                service_reserved: svcbuffer@0 {
> -                        compatible = "shared-dma-pool";
> -                        reg = <0x0 0x0 0x0 0x1000000>;
> -                        alignment = <0x1000>;
> -                        no-map;
> -                };
> -        };
> -
> -	firmware {
> -		svc {
> -			compatible = "intel,stratix10-svc";
> -			method = "smc";
> -			memory-region = <&service_reserved>;
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..e30e79d4c3150f90993e728320e9ef90d484a10d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Service Layer Driver for Stratix10 SoC
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@kernel.org>
> +  - Mahesh Rao <mahesh.rao@altera.com>
> +
> +description:

You need '>' on the end to preserve paragraphs.

> +  Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> +  processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> +  configured from HPS, there needs to be a way for HPS to notify SDM the
> +  location and size of the configuration data. Then SDM will get the
> +  configuration data from that location and perform the FPGA configuration.
> +
> +  To meet the whole system security needs and support virtual machine requesting
> +  communication with SDM, only the secure world of software (EL3, Exception
> +  Layer 3) can interface with SDM. All software entities running on other
> +  exception layers must channel through the EL3 software whenever it needs
> +  service from SDM.
> +
> +  Intel Stratix10 service layer driver, running at privileged exception level
> +  (EL1, Exception Layer 1), interfaces with the service providers and provides
> +  the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> +  driver also manages secure monitor call (SMC) to communicate with secure monitor
> +  code running in EL3.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - intel,stratix10-svc
> +      - intel,agilex-svc
> +
> +  method:
> +    description: |
> +                 Supervisory call method to be used to communicate with the
> +                 secure service layer.
> +                 Permitted values are:
> +                 - "smc" : SMC #0, following the SMCCC
> +                 - "hvc" : HVC #0, following the SMCCC

Indent by 2 more than 'description'.

> +
> +    $ref: /schemas/types.yaml#/definitions/string-array
> +    enum:
> +      - smc
> +      - hvc
> +
> +  memory-region:
> +    maxItems: 1
> +    description:
> +      phandle to a reserved memory region for the service layer driver to
> +      communicate with the secure device manager. For more details see
> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.

Please read what that file says.

> +
> +  fpga-mgr:
> +    $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
> +    description: Optional child node for fpga manager to perform fabric configuration.
> +
> +required:
> +  - compatible
> +  - method
> +  - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    reserved-memory {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +
> +      service_reserved: svcbuffer@0 {
> +              compatible = "shared-dma-pool";
> +              reg = <0x0 0x0 0x0 0x1000000>;
> +              alignment = <0x1000>;
> +              no-map;
> +      };
> +    };
> +
> +    firmware {
> +      svc {
> +        compatible = "intel,stratix10-svc";
> +        method = "smc";
> +        memory-region = <&service_reserved>;
> +
> +        fpga-mgr {
> +          compatible = "intel,stratix10-soc-fpga-mgr";
> +        };
> +      };
> +    };
> +
> 
> -- 
> 2.35.3
> 

Re: [PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema

[Mahesh Rao]

Hi Rob,

On 31-01-2025 08:56 pm, Rob Herring wrote:
> On Fri, Jan 31, 2025 at 06:17:25PM +0800, Mahesh Rao wrote:
>> Convert intel,stratix10-svc service layer devicetree
>> binding file from freeform format to json-schema.
>>
>> Also added DT binding for optional stratix10-soc
>> FPGA manager child node.
>>
>> Signed-off-by: Mahesh Rao<mahesh.rao@intel.com>
>> ---
>> +maintainers:
>> +  - Dinh Nguyen<dinguyen@kernel.org>
>> +  - Mahesh Rao<mahesh.rao@altera.com>
>> +
>> +description:
> You need '>' on the end to preserve paragraphs.
  Will make the change.
> +      - intel,stratix10-svc
> +      - intel,agilex-svc
> +
> +  method:
> +    description: |
> +                 Supervisory call method to be used to communicate with the
> +                 secure service layer.
> +                 Permitted values are:
> +                 - "smc" : SMC #0, following the SMCCC
> +                 - "hvc" : HVC #0, following the SMCCC
> Indent by 2 more than 'description'.
OK, will add the change.
>> +  memory-region:
>> +    maxItems: 1
>> +    description:
>> +      phandle to a reserved memory region for the service layer driver to
>> +      communicate with the secure device manager. For more details see
>> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
> Please read what that file says.

reserved-memory is moved to dtschema, shall I change this to the following?

memory-region:
     maxItems: 1
     description:
       Phandle to a reserved memory region for the service layer driver to
       communicate with the secure device manager.
       (See reserved-memory in dtschema project.)

Is this what is required?

Best regards

Mahesh Rao

Re: [PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema

[Krzysztof Kozlowski]

On 03/02/2025 11:42, Mahesh Rao wrote:
> OK, will add the change.
>>> +  memory-region:
>>> +    maxItems: 1
>>> +    description:
>>> +      phandle to a reserved memory region for the service layer driver to
>>> +      communicate with the secure device manager. For more details see
>>> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
>> Please read what that file says.
> 
> reserved-memory is moved to dtschema, shall I change this to the following?
> 
> memory-region:
>      maxItems: 1
>      description:
>        Phandle to a reserved memory region for the service layer driver to
>        communicate with the secure device manager.
>        (See reserved-memory in dtschema project.)
> 
> Is this what is required?

Drop:
"Phandle to a"
"(See reserved-memory in dtschema project.)"

They are redundant, because this cannot be anything else than phandle
and there is no need to say where each property is. You don't add such
statement about clocks, interrupts, reg or compatible, so no need for
memory-region.

Removal makes the description actually nicely compact and accurate. Just
how efficient text and code should be.


Best regards,
Krzysztof

Re: [PATCH v2 2/3] dt-bindings: firmware: stratix10: Convert to json-schema

[Mahesh Rao]

Hi Krzysztof,

On 03-02-2025 04:45 pm, Krzysztof Kozlowski wrote:
> On 03/02/2025 11:42, Mahesh Rao wrote:
>> OK, will add the change.
>>>> +  memory-region:
>>>> +    maxItems: 1
>>>> +    description:
>>>> +      phandle to a reserved memory region for the service layer driver to
>>>> +      communicate with the secure device manager. For more details see
>>>> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
>>> Please read what that file says.
>> reserved-memory is moved to dtschema, shall I change this to the following?
>>
>> memory-region:
>>       maxItems: 1
>>       description:
>>         Phandle to a reserved memory region for the service layer driver to
>>         communicate with the secure device manager.
>>         (See reserved-memory in dtschema project.)
>>
>> Is this what is required?
> Drop:
> "Phandle to a"
> "(See reserved-memory in dtschema project.)"
>
> They are redundant, because this cannot be anything else than phandle
> and there is no need to say where each property is. You don't add such
> statement about clocks, interrupts, reg or compatible, so no need for
> memory-region.
>
> Removal makes the description actually nicely compact and accurate. Just
> how efficient text and code should be.
>
>
> Best regards,
> Krzysztof

OK, thanks for the help. I will make the change.

Best regards

Mahesh Rao