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[24.205.208.113]) by smtp.gmail.com with ESMTPSA id m14sm15080864ooj.22.2022.02.15.08.09.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Feb 2022 08:09:50 -0800 (PST) Subject: Re: [PATCH v1 6/7] fpga: dfl: Handle dfl's starting with AFU To: Tianfei zhang , hao.wu@intel.com, mdf@kernel.org, yilun.xu@intel.com, linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: corbet@lwn.net, Matthew Gerlach References: <20220214112619.219761-1-tianfei.zhang@intel.com> <20220214112619.219761-7-tianfei.zhang@intel.com> From: Tom Rix Message-ID: <773f3851-f2d3-36e6-afab-a3cf73644b87@redhat.com> Date: Tue, 15 Feb 2022 08:09:49 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20220214112619.219761-7-tianfei.zhang@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org On 2/14/22 3:26 AM, Tianfei zhang wrote: > From: Matthew Gerlach > > Allow for a Device Feature List (DFL) to start with > a Device Feature Header (DFH) of type Accelerator Function Unit (AFU) > by doing nothing. This allows for PCIe VFs to be created. > > Signed-off-by: Matthew Gerlach > Signed-off-by: Tianfei Zhang > --- > drivers/fpga/dfl-pci.c | 7 ++++++- > drivers/fpga/dfl.c | 23 ++++++++++++++--------- > 2 files changed, 20 insertions(+), 10 deletions(-) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index 8abd9b408403..83b604d6dbe6 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -277,7 +277,12 @@ static int find_dfls_by_default(struct pci_dev *pcidev, > > dfl_fpga_enum_info_add_dfl(info, start, len); > } else { > - ret = -ENODEV; > + v = readq(base + DFH); This isn't likely to work on older cards. Is there there a version to key off of ? Tom > + if (FIELD_GET(DFH_TYPE, v) != DFH_TYPE_AFU) { > + dev_info(&pcidev->dev, "Unknown feature type 0x%llx id 0x%llx\n", > + FIELD_GET(DFH_TYPE, v), FIELD_GET(DFH_ID, v)); > + ret = -ENODEV; > + } > } > > /* release I/O mappings for next step enumeration */ > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c > index a5263ac258c5..25bd24a4cca0 100644 > --- a/drivers/fpga/dfl.c > +++ b/drivers/fpga/dfl.c > @@ -900,9 +900,11 @@ static void build_info_free(struct build_feature_devs_info *binfo) > dfl_id_free(feature_dev_id_type(binfo->feature_dev), > binfo->feature_dev->id); > > - list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { > - list_del(&finfo->node); > - kfree(finfo); > + if (!list_empty(&binfo->sub_features)) { > + list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { > + list_del(&finfo->node); > + kfree(finfo); > + } > } > } > > @@ -1437,6 +1439,7 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info) > > binfo->dev = info->dev; > binfo->cdev = cdev; > + INIT_LIST_HEAD(&binfo->sub_features); > > binfo->nr_irqs = info->nr_irqs; > if (info->nr_irqs) > @@ -1446,12 +1449,14 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info) > * start enumeration for all feature devices based on Device Feature > * Lists. > */ > - list_for_each_entry(dfl, &info->dfls, node) { > - ret = parse_feature_list(binfo, dfl->start, dfl->len); > - if (ret) { > - remove_feature_devs(cdev); > - build_info_free(binfo); > - goto unregister_region_exit; > + if (!list_empty(&info->dfls)) { > + list_for_each_entry(dfl, &info->dfls, node) { > + ret = parse_feature_list(binfo, dfl->start, dfl->len); > + if (ret) { > + remove_feature_devs(cdev); > + build_info_free(binfo); > + goto unregister_region_exit; > + } > } > } >