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([2001:818:ea8e:7f00:2575:914:eedd:620e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a073c8cc74sm10684829f8f.11.2025.04.28.02.02.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Apr 2025 02:02:24 -0700 (PDT) Message-ID: <85b09bd3217ed573438bde3f0f37424c9b582bd0.camel@gmail.com> Subject: Re: [PATCH RESEND v3 3/6] include: fpga: adi-axi-common: add new helper macros From: Nuno =?ISO-8859-1?Q?S=E1?= To: Xu Yilun , nuno.sa@analog.com Cc: linux-clk@vger.kernel.org, linux-fpga@vger.kernel.org, Stephen Boyd , Michael Turquette , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix Date: Mon, 28 Apr 2025 10:02:29 +0100 In-Reply-To: References: <20250421-dev-axi-clkgen-limits-v3-0-4203b4fed2c9@analog.com> <20250421-dev-axi-clkgen-limits-v3-3-4203b4fed2c9@analog.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.1 Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2025-04-24 at 18:16 +0800, Xu Yilun wrote: > On Mon, Apr 21, 2025 at 03:58:04PM +0100, Nuno S=C3=A1 via B4 Relay wrote= : > > From: Nuno S=C3=A1 > >=20 > > Add new helper macros and enums to help identifying the platform and so= me > > characteristics of it at runtime. > >=20 > > Signed-off-by: Nuno S=C3=A1 > > --- > > =C2=A0include/linux/fpga/adi-axi-common.h | 35 > > +++++++++++++++++++++++++++++++++++ >=20 > I'm wondering why these definitions (including existing ones) are in > fpga directory. They are not specific for any fpga_manager driver. I > suggest move the whole file out of fpga/ >=20 Just placed them in here because the header already existed in here... If acceptable, I have not problems in moving this file to include/linux. - Nuno S=C3=A1 > Thanks, > Yilun >=20 > > =C2=A01 file changed, 35 insertions(+) > >=20 > > diff --git a/include/linux/fpga/adi-axi-common.h b/include/linux/fpga/a= di- > > axi-common.h > > index > > 141ac3f251e6f256526812b9d55cd440a2a46e76..a832ef9b37473ca339a2a2ff8a4a5= 716d4 > > 28fd29 100644 > > --- a/include/linux/fpga/adi-axi-common.h > > +++ b/include/linux/fpga/adi-axi-common.h > > @@ -12,6 +12,8 @@ > > =C2=A0#define ADI_AXI_COMMON_H_ > > =C2=A0 > > =C2=A0#define ADI_AXI_REG_VERSION 0x0000 > > +#define ADI_AXI_REG_FPGA_INFO 0x001C > > +#define ADI_AXI_REG_FPGA_VOLTAGE 0x0140 > > =C2=A0 > > =C2=A0#define ADI_AXI_PCORE_VER(major, minor, patch) \ > > =C2=A0 (((major) << 16) | ((minor) << 8) | (patch)) > > @@ -20,4 +22,37 @@ > > =C2=A0#define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff= ) > > =C2=A0#define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff) > > =C2=A0 > > +#define ADI_AXI_INFO_FPGA_TECH(info)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (((info) >> 24) & 0xff) > > +#define ADI_AXI_INFO_FPGA_FAMILY(info)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 (((info) >> 16) & 0xff) > > +#define ADI_AXI_INFO_FPGA_SPEED_GRADE(info)=C2=A0=C2=A0=C2=A0=C2=A0 ((= (info) >> 8) & 0xff) > > +#define ADI_AXI_INFO_FPGA_VOLTAGE(val)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 ((val) & 0xffff) > > + > > +enum adi_axi_fpga_technology { > > + ADI_AXI_FPGA_TECH_UNKNOWN =3D 0, > > + ADI_AXI_FPGA_TECH_SERIES7, > > + ADI_AXI_FPGA_TECH_ULTRASCALE, > > + ADI_AXI_FPGA_TECH_ULTRASCALE_PLUS, > > +}; > > + > > +enum adi_axi_fpga_family { > > + ADI_AXI_FPGA_FAMILY_UNKNOWN =3D 0, > > + ADI_AXI_FPGA_FAMILY_ARTIX, > > + ADI_AXI_FPGA_FAMILY_KINTEX, > > + ADI_AXI_FPGA_FAMILY_VIRTEX, > > + ADI_AXI_FPGA_FAMILY_ZYNQ, > > +}; > > + > > +enum adi_axi_fpga_speed_grade { > > + ADI_AXI_FPGA_SPEED_UNKNOWN=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D 0, > > + ADI_AXI_FPGA_SPEED_1=C2=A0=C2=A0=C2=A0 =3D 10, > > + ADI_AXI_FPGA_SPEED_1L=C2=A0=C2=A0 =3D 11, > > + ADI_AXI_FPGA_SPEED_1H=C2=A0=C2=A0 =3D 12, > > + ADI_AXI_FPGA_SPEED_1HV=C2=A0 =3D 13, > > + ADI_AXI_FPGA_SPEED_1LV=C2=A0 =3D 14, > > + ADI_AXI_FPGA_SPEED_2=C2=A0=C2=A0=C2=A0 =3D 20, > > + ADI_AXI_FPGA_SPEED_2L=C2=A0=C2=A0 =3D 21, > > + ADI_AXI_FPGA_SPEED_2LV=C2=A0 =3D 22, > > + ADI_AXI_FPGA_SPEED_3=C2=A0=C2=A0=C2=A0 =3D 30, > > +}; > > + > > =C2=A0#endif /* ADI_AXI_COMMON_H_ */ > >=20 > > --=20 > > 2.49.0 > >=20 > >=20 > >=20