From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: From: Randy Dunlap Subject: [PATCH v6 12/29] fpga: add FPGA DFL PCIe device driver References: <1528798243-2029-1-git-send-email-hao.wu@intel.com> <1528798243-2029-13-git-send-email-hao.wu@intel.com> Message-ID: <87a783f1-9db8-e56d-c4c4-1802c29c416a@infradead.org> Date: Tue, 12 Jun 2018 08:27:27 -0700 MIME-Version: 1.0 In-Reply-To: <1528798243-2029-13-git-send-email-hao.wu@intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit To: Wu Hao , atull@kernel.org, mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: linux-api@vger.kernel.org, luwei.kang@intel.com, yi.z.zhang@intel.com, Tim Whisonant , Enno Luebbers , Shiva Rao , Christopher Rauer , Xiao Guangrong List-ID: Hi, On 06/12/2018 03:10 AM, Wu Hao wrote: > From: Zhang Yi > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index 4052532..5faab48 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -146,4 +146,19 @@ config FPGA_DFL > Gate Array (FPGA) solutions which implement Device Feature List. > It provides enumeration APIs, and feature device infrastructure. > > +config FPGA_DFL_PCI > + tristate "FPGA DFL PCIe Device Driver" > + depends on PCI && FPGA_DFL > + help > + Select this option to enable PCIe driver for PCIe based PCIe-based > + Field-Programmable Gate Array (FPGA) solutions which implemented which implement > + the Device Feature List (DFL). This driver provides interfaces > + for userspace applications to configure, enumerate, open and access > + FPGA accelerators on the FPGA DFL devices, enables system level > + management functions such as FPGA partial reconfiguration, power > + management, and virtualization with DFL framework and DFL feature > + device drivers. > + > + To compile this as a module, choose M here. > + > endif # FPGA -- ~Randy