* [PATCH v3] add the FPGA Device Feature List (DFL) EMIF support @ 2020-09-21 5:31 Xu Yilun 2020-09-21 5:31 ` [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver Xu Yilun 0 siblings, 1 reply; 6+ messages in thread From: Xu Yilun @ 2020-09-21 5:31 UTC (permalink / raw) To: krzk, mdf, linux-fpga, linux-kernel; +Cc: trix, yilun.xu, lgoncalv The driver supports the EMIF controller on Intel Programmable Acceleration Card (PAC). The controller manages the on-board memory of the PCIe card. Hi Moritz: I have sent 2 versions of the patch to Krzysztof who maintains the drivers/memory folder. And because this patch depends on the previous fpga patchset "Modularization of DFL private feature drivers" & "add dfl bus support to MODULE_DEVICE_TABLE()", it cannot be applied independently to Krzysztof's branch until next cycle. So he suggests, "please send a v3 of this patch with the fix above and let's apply it via Moritz's tree." So could you help do that? After it got the acked-by from Krzysztof. Thanks, Yilun Xu Yilun (1): memory: dfl-emif: add the DFL EMIF private feature driver .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ drivers/memory/Kconfig | 9 + drivers/memory/Makefile | 2 + drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ 4 files changed, 243 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif create mode 100644 drivers/memory/dfl-emif.c -- 2.7.4 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver 2020-09-21 5:31 [PATCH v3] add the FPGA Device Feature List (DFL) EMIF support Xu Yilun @ 2020-09-21 5:31 ` Xu Yilun 2020-09-21 7:23 ` Krzysztof Kozlowski 0 siblings, 1 reply; 6+ messages in thread From: Xu Yilun @ 2020-09-21 5:31 UTC (permalink / raw) To: krzk, mdf, linux-fpga, linux-kernel; +Cc: trix, yilun.xu, lgoncalv, Russ Weight This driver is for the EMIF private feature implemented under FPGA Device Feature List (DFL) framework. It is used to expose memory interface status information as well as memory clearing control. The purpose of memory clearing block is to zero out all private memory when FPGA is to be reprogrammed. This gives users a reliable method to prevent potential data leakage. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> --- v2: Adjust the position of this driver in Kconfig. Improves the name of the Kconfig option. Change the include dfl-bus.h to dfl.h, cause the previous patchset renames the file. Some minor fixes and comment improvement. v3: Adjust the position of the driver in Makefile. --- .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ drivers/memory/Kconfig | 9 + drivers/memory/Makefile | 2 + drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ 4 files changed, 243 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif create mode 100644 drivers/memory/dfl-emif.c diff --git a/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif new file mode 100644 index 0000000..56f97dc --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif @@ -0,0 +1,25 @@ +What: /sys/bus/dfl/devices/dfl_dev.X/infX_cal_fail +Date: Sep 2020 +KernelVersion: 5.10 +Contact: Xu Yilun <yilun.xu@intel.com> +Description: Read-only. It indicates if the calibration failed on this + memory interface. "1" for calibration failure, "0" for OK. + Format: %u + +What: /sys/bus/dfl/devices/dfl_dev.X/infX_init_done +Date: Sep 2020 +KernelVersion: 5.10 +Contact: Xu Yilun <yilun.xu@intel.com> +Description: Read-only. It indicates if the initialization completed on + this memory interface. "1" for initialization complete, "0" + for not yet. + Format: %u + +What: /sys/bus/dfl/devices/dfl_dev.X/infX_clear +Date: Sep 2020 +KernelVersion: 5.10 +Contact: Xu Yilun <yilun.xu@intel.com> +Description: Write-only. Writing "1" to this file will zero out all memory + data in this memory interface. Writing of other values is + invalid. + Format: %u diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 00e013b..2495bc4 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -137,6 +137,15 @@ config TI_EMIF_SRAM sequence so this driver provides several relocatable PM functions for the SoC PM code to use. +config FPGA_DFL_EMIF + tristate "FPGA DFL EMIF Driver" + depends on FPGA_DFL && HAS_IOMEM + help + This driver is for the EMIF private feature implemented under + FPGA Device Feature List (DFL) framework. It is used to expose + memory interface status information as well as memory clearing + control. + config MVEBU_DEVBUS bool "Marvell EBU Device Bus Controller" default y if PLAT_ORION diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index e71cf7b..bc7663e 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -28,6 +28,8 @@ obj-$(CONFIG_STM32_FMC2_EBI) += stm32-fmc2-ebi.o obj-$(CONFIG_SAMSUNG_MC) += samsung/ obj-$(CONFIG_TEGRA_MC) += tegra/ obj-$(CONFIG_TI_EMIF_SRAM) += ti-emif-sram.o +obj-$(CONFIG_FPGA_DFL_EMIF) += dfl-emif.o + ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a diff --git a/drivers/memory/dfl-emif.c b/drivers/memory/dfl-emif.c new file mode 100644 index 0000000..0799d53 --- /dev/null +++ b/drivers/memory/dfl-emif.c @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * DFL device driver for EMIF private feature + * + * Copyright (C) 2020 Intel Corporation, Inc. + * + */ +#include <linux/bitfield.h> +#include <linux/errno.h> +#include <linux/fpga/dfl.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <linux/io-64-nonatomic-lo-hi.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/spinlock.h> +#include <linux/types.h> + +#define FME_FEATURE_ID_EMIF 0x9 + +#define EMIF_STAT 0x8 +#define EMIF_STAT_INIT_DONE_SFT 0 +#define EMIF_STAT_CALC_FAIL_SFT 8 +#define EMIF_STAT_CLEAR_BUSY_SFT 16 +#define EMIF_CTRL 0x10 +#define EMIF_CTRL_CLEAR_EN_SFT 0 +#define EMIF_CTRL_CLEAR_EN_MSK GENMASK_ULL(3, 0) + +#define EMIF_POLL_INVL 10000 /* us */ +#define EMIF_POLL_TIMEOUT 5000000 /* us */ + +struct dfl_emif { + struct device *dev; + void __iomem *base; + spinlock_t lock; /* Serialises access to EMIF_CTRL reg */ +}; + +struct emif_attr { + struct device_attribute attr; + u32 shift; + u32 index; +}; + +#define to_emif_attr(dev_attr) \ + container_of(dev_attr, struct emif_attr, attr) + +static ssize_t emif_state_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct emif_attr *eattr = to_emif_attr(attr); + struct dfl_emif *de = dev_get_drvdata(dev); + u64 val; + + val = readq(de->base + EMIF_STAT); + + return sprintf(buf, "%u\n", + !!(val & BIT_ULL(eattr->shift + eattr->index))); +} + +static ssize_t emif_clear_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct emif_attr *eattr = to_emif_attr(attr); + struct dfl_emif *de = dev_get_drvdata(dev); + u64 clear_busy_msk, clear_en_msk, val; + void __iomem *base = de->base; + + if (!sysfs_streq(buf, "1")) + return -EINVAL; + + clear_busy_msk = BIT_ULL(EMIF_STAT_CLEAR_BUSY_SFT + eattr->index); + clear_en_msk = BIT_ULL(EMIF_CTRL_CLEAR_EN_SFT + eattr->index); + + spin_lock(&de->lock); + /* The CLEAR_EN field is WO, but other fields are RW */ + val = readq(base + EMIF_CTRL); + val &= ~EMIF_CTRL_CLEAR_EN_MSK; + val |= clear_en_msk; + writeq(val, base + EMIF_CTRL); + spin_unlock(&de->lock); + + if (readq_poll_timeout(base + EMIF_STAT, val, + !(val & clear_busy_msk), + EMIF_POLL_INVL, EMIF_POLL_TIMEOUT)) { + dev_err(de->dev, "timeout, fail to clear\n"); + return -ETIMEDOUT; + } + + return count; +} + +#define emif_state_attr(_name, _shift, _index) \ + struct emif_attr emif_attr_##inf##_index##_##_name = \ + { .attr = __ATTR(inf##_index##_##_name, 0444, \ + emif_state_show, NULL), \ + .shift = (_shift), .index = (_index) } + +#define emif_clear_attr(_index) \ + struct emif_attr emif_attr_##inf##_index##_clear = \ + { .attr = __ATTR(inf##_index##_clear, 0200, \ + NULL, emif_clear_store), \ + .index = (_index) } + +emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 0); +emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 1); +emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 2); +emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 3); + +emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 0); +emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 1); +emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 2); +emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 3); + +emif_clear_attr(0); +emif_clear_attr(1); +emif_clear_attr(2); +emif_clear_attr(3); + +static struct attribute *dfl_emif_attrs[] = { + &emif_attr_inf0_init_done.attr.attr, + &emif_attr_inf0_cal_fail.attr.attr, + &emif_attr_inf0_clear.attr.attr, + + &emif_attr_inf1_init_done.attr.attr, + &emif_attr_inf1_cal_fail.attr.attr, + &emif_attr_inf1_clear.attr.attr, + + &emif_attr_inf2_init_done.attr.attr, + &emif_attr_inf2_cal_fail.attr.attr, + &emif_attr_inf2_clear.attr.attr, + + &emif_attr_inf3_init_done.attr.attr, + &emif_attr_inf3_cal_fail.attr.attr, + &emif_attr_inf3_clear.attr.attr, + + NULL, +}; + +static umode_t dfl_emif_visible(struct kobject *kobj, + struct attribute *attr, int n) +{ + struct dfl_emif *de = dev_get_drvdata(kobj_to_dev(kobj)); + struct emif_attr *eattr = container_of(attr, struct emif_attr, + attr.attr); + u64 val; + + /* + * This device supports upto 4 memory interfaces, but not all + * interfaces are used on different platforms. The read out value of + * CLEAN_EN field (which is a bitmap) could tell how many interfaces + * are available. + */ + val = FIELD_GET(EMIF_CTRL_CLEAR_EN_MSK, readq(de->base + EMIF_CTRL)); + + return (val & BIT_ULL(eattr->index)) ? attr->mode : 0; +} + +static const struct attribute_group dfl_emif_group = { + .is_visible = dfl_emif_visible, + .attrs = dfl_emif_attrs, +}; + +static const struct attribute_group *dfl_emif_groups[] = { + &dfl_emif_group, + NULL, +}; + +static int dfl_emif_probe(struct dfl_device *dfl_dev) +{ + struct device *dev = &dfl_dev->dev; + struct dfl_emif *de; + + de = devm_kzalloc(dev, sizeof(*de), GFP_KERNEL); + if (!de) + return -ENOMEM; + + de->base = devm_ioremap_resource(dev, &dfl_dev->mmio_res); + if (IS_ERR(de->base)) + return PTR_ERR(de->base); + + de->dev = dev; + spin_lock_init(&de->lock); + dev_set_drvdata(dev, de); + + return 0; +} + +static const struct dfl_device_id dfl_emif_ids[] = { + { FME_ID, FME_FEATURE_ID_EMIF }, + { } +}; +MODULE_DEVICE_TABLE(dfl, dfl_emif_ids); + +static struct dfl_driver dfl_emif_driver = { + .drv = { + .name = "dfl-emif", + .dev_groups = dfl_emif_groups, + }, + .id_table = dfl_emif_ids, + .probe = dfl_emif_probe, +}; +module_dfl_driver(dfl_emif_driver); + +MODULE_DESCRIPTION("DFL EMIF driver"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_LICENSE("GPL v2"); -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver 2020-09-21 5:31 ` [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver Xu Yilun @ 2020-09-21 7:23 ` Krzysztof Kozlowski 2020-09-21 20:31 ` Moritz Fischer 0 siblings, 1 reply; 6+ messages in thread From: Krzysztof Kozlowski @ 2020-09-21 7:23 UTC (permalink / raw) To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, lgoncalv, Russ Weight On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote: > This driver is for the EMIF private feature implemented under FPGA > Device Feature List (DFL) framework. It is used to expose memory > interface status information as well as memory clearing control. > > The purpose of memory clearing block is to zero out all private memory > when FPGA is to be reprogrammed. This gives users a reliable method to > prevent potential data leakage. > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > Signed-off-by: Russ Weight <russell.h.weight@intel.com> > --- > v2: Adjust the position of this driver in Kconfig. > Improves the name of the Kconfig option. > Change the include dfl-bus.h to dfl.h, cause the previous patchset > renames the file. > Some minor fixes and comment improvement. > v3: Adjust the position of the driver in Makefile. > --- > .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ > drivers/memory/Kconfig | 9 + > drivers/memory/Makefile | 2 + > drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ > 4 files changed, 243 insertions(+) > create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > create mode 100644 drivers/memory/dfl-emif.c > Hi Moritz, Since this depends on dfl patches, I would need a stable tag with them or you can take it directly: Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver 2020-09-21 7:23 ` Krzysztof Kozlowski @ 2020-09-21 20:31 ` Moritz Fischer 2020-09-21 20:46 ` Krzysztof Kozlowski 0 siblings, 1 reply; 6+ messages in thread From: Moritz Fischer @ 2020-09-21 20:31 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Xu Yilun, mdf, linux-fpga, linux-kernel, trix, lgoncalv, Russ Weight Hi Krzysztof, On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote: > On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote: > > This driver is for the EMIF private feature implemented under FPGA > > Device Feature List (DFL) framework. It is used to expose memory > > interface status information as well as memory clearing control. > > > > The purpose of memory clearing block is to zero out all private memory > > when FPGA is to be reprogrammed. This gives users a reliable method to > > prevent potential data leakage. > > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > > Signed-off-by: Russ Weight <russell.h.weight@intel.com> > > --- > > v2: Adjust the position of this driver in Kconfig. > > Improves the name of the Kconfig option. > > Change the include dfl-bus.h to dfl.h, cause the previous patchset > > renames the file. > > Some minor fixes and comment improvement. > > v3: Adjust the position of the driver in Makefile. > > --- > > .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ > > drivers/memory/Kconfig | 9 + > > drivers/memory/Makefile | 2 + > > drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ > > 4 files changed, 243 insertions(+) > > create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > > create mode 100644 drivers/memory/dfl-emif.c > > > > Hi Moritz, > > Since this depends on dfl patches, I would need a stable tag with them > or you can take it directly: > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> > > Best regards, > Krzysztof The FPGA patches go through Greg's tree. For the time being it's probably easiest if I take the changes through my tree once Greg pulled my tree. Do you have any feedback to better handle this sort of subsystem spanning changesets for me? Thanks, Moritz ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver 2020-09-21 20:31 ` Moritz Fischer @ 2020-09-21 20:46 ` Krzysztof Kozlowski 2020-09-22 3:17 ` Moritz Fischer 0 siblings, 1 reply; 6+ messages in thread From: Krzysztof Kozlowski @ 2020-09-21 20:46 UTC (permalink / raw) To: Moritz Fischer Cc: Xu Yilun, linux-fpga, linux-kernel@vger.kernel.org, trix, lgoncalv, Russ Weight WhOn Mon, 21 Sep 2020 at 22:31, Moritz Fischer <mdf@kernel.org> wrote: > > Hi Krzysztof, > > On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote: > > On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote: > > > This driver is for the EMIF private feature implemented under FPGA > > > Device Feature List (DFL) framework. It is used to expose memory > > > interface status information as well as memory clearing control. > > > > > > The purpose of memory clearing block is to zero out all private memory > > > when FPGA is to be reprogrammed. This gives users a reliable method to > > > prevent potential data leakage. > > > > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > > > Signed-off-by: Russ Weight <russell.h.weight@intel.com> > > > --- > > > v2: Adjust the position of this driver in Kconfig. > > > Improves the name of the Kconfig option. > > > Change the include dfl-bus.h to dfl.h, cause the previous patchset > > > renames the file. > > > Some minor fixes and comment improvement. > > > v3: Adjust the position of the driver in Makefile. > > > --- > > > .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ > > > drivers/memory/Kconfig | 9 + > > > drivers/memory/Makefile | 2 + > > > drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ > > > 4 files changed, 243 insertions(+) > > > create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > > > create mode 100644 drivers/memory/dfl-emif.c > > > > > > > Hi Moritz, > > > > Since this depends on dfl patches, I would need a stable tag with them > > or you can take it directly: > > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> > > > > Best regards, > > Krzysztof > > The FPGA patches go through Greg's tree. For the time being it's > probably easiest if I take the changes through my tree once Greg pulled > my tree. Yes. > > Do you have any feedback to better handle this sort of subsystem > spanning changesets for me? The easiest through a separate branch. Assuming that such need for sharing patches is known. If the patches touch generic things, which could be used by other drivers/subsystems, or if it is known that there will be someone depending on them, the easiest is to put them on separate branch which you later merge into your for-next. You send to Greg your for-next. If these patches are needed by someone else, e.g. me, you prepare a tag on them and send a pull request with that tag. I pull it and send these (and only these!) along with other patches. No duplication of commits, only two merges. Recent example was here: https://lore.kernel.org/lkml/20200819191722.GA38371@sirena.org.uk/ where Mark Brown wanted these through his tree, but later work on Samsung ARM depended on them. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver 2020-09-21 20:46 ` Krzysztof Kozlowski @ 2020-09-22 3:17 ` Moritz Fischer 0 siblings, 0 replies; 6+ messages in thread From: Moritz Fischer @ 2020-09-22 3:17 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Moritz Fischer, Xu Yilun, linux-fpga, linux-kernel@vger.kernel.org, trix, lgoncalv, Russ Weight Hi Krzysztof, On Mon, Sep 21, 2020 at 10:46:45PM +0200, Krzysztof Kozlowski wrote: > WhOn Mon, 21 Sep 2020 at 22:31, Moritz Fischer <mdf@kernel.org> wrote: > > > > Hi Krzysztof, > > > > On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote: > > > On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote: > > > > This driver is for the EMIF private feature implemented under FPGA > > > > Device Feature List (DFL) framework. It is used to expose memory > > > > interface status information as well as memory clearing control. > > > > > > > > The purpose of memory clearing block is to zero out all private memory > > > > when FPGA is to be reprogrammed. This gives users a reliable method to > > > > prevent potential data leakage. > > > > > > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > > > > Signed-off-by: Russ Weight <russell.h.weight@intel.com> > > > > --- > > > > v2: Adjust the position of this driver in Kconfig. > > > > Improves the name of the Kconfig option. > > > > Change the include dfl-bus.h to dfl.h, cause the previous patchset > > > > renames the file. > > > > Some minor fixes and comment improvement. > > > > v3: Adjust the position of the driver in Makefile. > > > > --- > > > > .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ > > > > drivers/memory/Kconfig | 9 + > > > > drivers/memory/Makefile | 2 + > > > > drivers/memory/dfl-emif.c | 207 +++++++++++++++++++++ > > > > 4 files changed, 243 insertions(+) > > > > create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > > > > create mode 100644 drivers/memory/dfl-emif.c > > > > > > > > > > Hi Moritz, > > > > > > Since this depends on dfl patches, I would need a stable tag with them > > > or you can take it directly: > > > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> > > > > > > Best regards, > > > Krzysztof > > > > The FPGA patches go through Greg's tree. For the time being it's > > probably easiest if I take the changes through my tree once Greg pulled > > my tree. > > Yes. > > > > > Do you have any feedback to better handle this sort of subsystem > > spanning changesets for me? > > The easiest through a separate branch. Assuming that such need for > sharing patches is known. > > If the patches touch generic things, which could be used by other > drivers/subsystems, or if it is known that there will be someone > depending on them, the easiest is to put them on separate branch which > you later merge into your for-next. You send to Greg your for-next. If > these patches are needed by someone else, e.g. me, you prepare a tag > on them and send a pull request with that tag. I pull it and send > these (and only these!) along with other patches. No duplication of > commits, only two merges. > > Recent example was here: > https://lore.kernel.org/lkml/20200819191722.GA38371@sirena.org.uk/ > where Mark Brown wanted these through his tree, but later work on > Samsung ARM depended on them. > > Best regards, > Krzysztof Appreciate the explanation, that makes sense. Thanks for taking the time. I'll do this moving forward. Cheers, Moritz ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-09-22 3:17 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-09-21 5:31 [PATCH v3] add the FPGA Device Feature List (DFL) EMIF support Xu Yilun 2020-09-21 5:31 ` [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature driver Xu Yilun 2020-09-21 7:23 ` Krzysztof Kozlowski 2020-09-21 20:31 ` Moritz Fischer 2020-09-21 20:46 ` Krzysztof Kozlowski 2020-09-22 3:17 ` Moritz Fischer
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