From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: MIME-Version: 1.0 References: <1553483264-5379-1-git-send-email-hao.wu@intel.com> <1553483264-5379-2-git-send-email-hao.wu@intel.com> In-Reply-To: <1553483264-5379-2-git-send-email-hao.wu@intel.com> From: Alan Tull Date: Mon, 25 Mar 2019 12:28:22 -0500 Message-ID: Subject: Re: [PATCH 01/17] fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address. Content-Type: text/plain; charset="UTF-8" To: Wu Hao Cc: Moritz Fischer , linux-fpga@vger.kernel.org, linux-kernel , linux-api@vger.kernel.org List-ID: On Sun, Mar 24, 2019 at 10:23 PM Wu Hao wrote: Hi Hao, > > FME_PR_INTFC_ID is used as compat_id for fpga manager and region, > but high 64 bits and low 64 bits of the compat_id are swapped by > mistake. This patch fixes this problem by fixing register address. > > Signed-off-by: Wu Hao Acked-by: Alan Tull Thanks, Alan > --- > drivers/fpga/dfl-fme-mgr.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c > index 76f3770..b3f7eee 100644 > --- a/drivers/fpga/dfl-fme-mgr.c > +++ b/drivers/fpga/dfl-fme-mgr.c > @@ -30,8 +30,8 @@ > #define FME_PR_STS 0x10 > #define FME_PR_DATA 0x18 > #define FME_PR_ERR 0x20 > -#define FME_PR_INTFC_ID_H 0xA8 > -#define FME_PR_INTFC_ID_L 0xB0 > +#define FME_PR_INTFC_ID_L 0xA8 > +#define FME_PR_INTFC_ID_H 0xB0 > > /* FME PR Control Register Bitfield */ > #define FME_PR_CTRL_PR_RST BIT_ULL(0) /* Reset PR engine */ > -- > 2.7.4 >