From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59F62C38142 for ; Tue, 31 Jan 2023 12:18:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230172AbjAaMQ4 (ORCPT ); Tue, 31 Jan 2023 07:16:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231556AbjAaMQw (ORCPT ); Tue, 31 Jan 2023 07:16:52 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BCFF460B3 for ; Tue, 31 Jan 2023 04:16:50 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E5219614E2 for ; Tue, 31 Jan 2023 12:16:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 05C88C433EF; Tue, 31 Jan 2023 12:16:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675167409; bh=cdt+UnDTSZKtz9IltJxk4dQSt18CNbMBgerwFKkxuGc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=jZeOQYzK57VjX2lfKdIbE1S15/qaY8+VKM9nb9qnJ739XJSzvg4QTpSHvBEiKZh4V gO86osbhDHAZAxJLsNUHPi5DmyjGlKexWY/0EzQWUUBKVMVRL/V8vl1b1zH2aD+yhk 0q0vJnS9rdCV6Z8h4Om8oAq7MJp1OU0OlkyZ/jPnX5eyilNgy4iQ6jmTpk0kmcpGAF rgcDKbK1eQ/+acwiZ6B7DjuXY6D04e9Q8xz2Vy+68AEu5SapSIfyObfMtr316rJZAL hQYC/27Crr2x5kWLyhdeLZ8s0IkY249StZSw7Ruim0lcoZL1ZNnCWWDlNZRv5QC3VA 8rYTW8D/UC/mQ== Date: Tue, 31 Jan 2023 12:16:44 +0000 From: Lee Jones To: Greg KH Cc: Xu Yilun , linux-fpga@vger.kernel.org, hao.wu@intel.com, mdf@kernel.org Subject: Re: [PATCH 1/1] fpga: m10bmc-sec: Add support for N6000 Message-ID: References: <20230131024121.940195-1-yilun.xu@intel.com> <20230131024121.940195-2-yilun.xu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org On Tue, 31 Jan 2023, Greg KH wrote: > On Tue, Jan 31, 2023 at 10:58:23AM +0000, Lee Jones wrote: > > On Tue, 31 Jan 2023, Xu Yilun wrote: > > > > > On 2023-01-31 at 09:08:35 +0000, Lee Jones wrote: > > > > On Tue, 31 Jan 2023, Xu Yilun wrote: > > > > > > > > > From: Ilpo Järvinen > > > > > > > > > > Add support for PMCI-based flash access path and N6000 sec update > > > > > support. Access to flash staging area is different for N6000 from that > > > > > of the SPI interfaced counterparts. > > > > > > > > > > Introduce intel_m10bmc_flash_bulk_ops to allow interface specific > > > > > differentiations for the flash access path for sec update and make > > > > > m10bmc_sec_read/write() in sec update driver to use the new operations. > > > > > The .flash_mutex serializes read/read. Flash update (erase+write) must > > > > > use ->lock/unlock_write() to prevent reads during update (reads would > > > > > timeout on setting flash MUX as BMC will prevent it). > > > > > > > > > > Create a type specific RSU status reg handler for N6000 because the > > > > > field has moved from doorbell to auth result register. > > > > > > > > > > If a failure is detected while altering the flash MUX, it seems safer > > > > > to try to set it back and doesn't seem harmful. Likely there are enough > > > > > troubles in that case anyway so setting it back fails too (which is > > > > > harmless sans the small extra delay) or just confirms that the value > > > > > wasn't changed. > > > > > > > > > > Co-developed-by: Tianfei zhang > > > > > Signed-off-by: Tianfei zhang > > > > > Co-developed-by: Russ Weight > > > > > Signed-off-by: Russ Weight > > > > > Acked-by: Xu Yilun > > > > > Signed-off-by: Ilpo Järvinen > > > > > Signed-off-by: Lee Jones > > > > > Link: https://lore.kernel.org/r/20230116100845.6153-12-ilpo.jarvinen@linux.intel.com > > > > > --- > > > > > drivers/fpga/intel-m10-bmc-sec-update.c | 51 ++++- > > > > > drivers/mfd/intel-m10-bmc-pmci.c | 242 +++++++++++++++++++++++- > > > > > include/linux/mfd/intel-m10-bmc.h | 51 +++++ > > > > > 3 files changed, 336 insertions(+), 8 deletions(-) > > > > > > > > I'm confused, what are you trying to achieve? > > > > > > I'm trying to submit the last patch to Greg's char-misc-next for > > > v6.3-rc1. The first 10 patches in this series have been accepted by him > > > in this cycle. > > > > > > This is the only one patch so I just send it rather than making an extra > > > pull request. > > > > That doesn't work with commits being routed in via multiple subsystems > > simultaneously. You'll end up with complications due to differing > > commit SHAs. > > > > If you really need this patch to be applied to FPGA (hint: I don't think > > it matters), then Greg will need to pull v2 [0] of the immutable topic > > branch. > > > > However, the whole set is being routed in via (at least) MFD anyway, so > > I think we can just leave it as it is for now. > > > > [0] https://lore.kernel.org/linux-fpga/Y9d9MmttFUqnCyCs@google.com/ > > Ok, I'll drop this from my review queue, but I thought I had the branch > already pulled into my tree, but who knows anymore :) > > Maybe this should all just be resent after 6.3-rc1 is out as things will > be cleared up by then? You have 10 out of 11 patches applied (via my PR), but I missed a patch. To solve I submitted a [GIT PULL v2] which was the v1 with the missing patch on top. I doubt you need to do anything since the whole stack is going in via the MFD tree anyway. -- Lee Jones [李琼斯]