[PATCH 0/3] Enable FPGA Manager support for Agilex5

[PATCH 0/3] Enable FPGA Manager support for Agilex5

[Khairul Anuar Romli]

This patch series adds device tree bindings, driver support, and DTS
updates to enable FPGA Manager functionality for Intel Agilex5 SoC.

These changes are intended to enable FPGA programming and management
capabilities on Agilex5-based platforms.

---
Notes:
Patch #3 depends on  "arm64: dts: intel: Add Agilex5 SVC node with memory
region" from
https://lore.kernel.org/all/3381ef56c1ff34a0b54cf76010889b5523ead825.1762387665.git.khairul.anuar.romli@altera.com/

This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19
---
Khairul Anuar Romli (3):
  dt-bindings: fpga: stratix10: add support for Agilex5
  fpga: stratix10-soc: Add support for Agilex5
  arm64: dts: agilex5: add fpga-region and fpga-mgr nodes

 .../bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml   |  1 +
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi        | 11 +++++++++++
 drivers/fpga/stratix10-soc.c                          |  1 +
 3 files changed, 13 insertions(+)

-- 
2.43.7

[PATCH 2/3] fpga: stratix10-soc: Add support for Agilex5

[Khairul Anuar Romli]

Agilex5 device tree now use a dedicated compatible string for FPGA manager
node. The driver relies on matching both the device tree compatible string
and the s10_of_match table during s10_init().

Without this change, the s10_init() function would fail to initialize the
FPGA manager on Agilex5 platforms because the required compatible string is
missing, preventing the driver from loading.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
---
 drivers/fpga/stratix10-soc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
index 0a295ccf1644..4ac368b55754 100644
--- a/drivers/fpga/stratix10-soc.c
+++ b/drivers/fpga/stratix10-soc.c
@@ -448,6 +448,7 @@ static void s10_remove(struct platform_device *pdev)
 static const struct of_device_id s10_of_match[] = {
 	{.compatible = "intel,stratix10-soc-fpga-mgr"},
 	{.compatible = "intel,agilex-soc-fpga-mgr"},
+	{.compatible = "intel,agilex5-soc-fpga-mgr"},
 	{},
 };
 
-- 
2.43.7

[PATCH 3/3] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes

[Khairul Anuar Romli]

The Intel Agilex 5 SoC contains a programmable FPGA region that requires
proper device tree description to enable FPGA manager support in the
Linux kernel. Without the 'fpga-region' and 'fpga-mgr' nodes, the
kernel cannot detect or manage the FPGA hardware correctly.

This patch adds a 'fpga-region' node with compatible = "fpga-region",
along with appropriate #address-cells and #size-cells properties, to
describe the FPGA region layout.

It also defines the 'fpga_mgr' node with compatible =
"intel,agilex5-soc-fpga-mgr" and links it from the 'fpga-region' node
via the 'fpga-mgr' property.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index bf7128adddde..10dd8ec641cc 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -85,9 +85,20 @@ svc {
 			method = "smc";
 			memory-region = <&service_reserved>;
 			iommus = <&smmu 10>;
+
+			fpga_mgr: fpga-mgr {
+				compatible = "intel,agilex5-soc-fpga-mgr";
+			};
 		};
 	};
 
+	fpga-region {
+		compatible = "fpga-region";
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		fpga-mgr = <&fpga_mgr>;
+	};
+
 	psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
-- 
2.43.7