* [PATCH v4 0/2] Enable FPGA Manager support for Agilex5
@ 2025-11-18 1:11 Khairul Anuar Romli
2025-11-18 1:11 ` [PATCH v4 1/2] dt-bindings: fpga: stratix10: add " Khairul Anuar Romli
2025-11-18 1:11 ` [PATCH v4 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes Khairul Anuar Romli
0 siblings, 2 replies; 6+ messages in thread
From: Khairul Anuar Romli @ 2025-11-18 1:11 UTC (permalink / raw)
To: Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin,
Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree,
Khairul Anuar Romli
This patch series adds device tree bindings, driver and DTS updates to
enable FPGA Manager functionality for Intel Agilex5 SoC.
These changes are intended to enable FPGA programming and FPGA management
capabilities on Agilex5-based platforms.
---
Notes:
Patch #2 depends on "arm64: dts: intel: Add Agilex5 SVC node with memory
region" from
https://lore.kernel.org/all/3381ef56c1ff34a0b54cf76010889b5523ead825.1762387665.git.khairul.anuar.romli@altera.com/
This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19
Changes in v4:
- Simplify the compatible property to use enum without items.
- Use contains instead of oneOf due to the use of enum without items.
Changes in v3:
- Add fallback in altera's soc fpga manager compatible properties.
- Validate with make CHECK_DBTS=y on:
- intel/socfpga_agilex5_socdk.dtb (fallback)
- intel/socfpga_agilex_socdk.dtb (non-fallback)
- altera/socfpga_stratix10_socdk.dtb (non-fallback)
Changes in v2:
- Drop "fpga: stratix10-soc: Add support for Agilex5"
- Add fallback compatible in DT
---
Khairul Anuar Romli (2):
dt-bindings: fpga: stratix10: add support for Agilex5
arm64: dts: agilex5: add fpga-region and fpga-mgr nodes
.../bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml | 8 +++++---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 ++++++++++++
2 files changed, 17 insertions(+), 3 deletions(-)
--
2.43.7
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v4 1/2] dt-bindings: fpga: stratix10: add support for Agilex5 2025-11-18 1:11 [PATCH v4 0/2] Enable FPGA Manager support for Agilex5 Khairul Anuar Romli @ 2025-11-18 1:11 ` Khairul Anuar Romli 2025-11-18 19:07 ` Conor Dooley 2025-11-18 1:11 ` [PATCH v4 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes Khairul Anuar Romli 1 sibling, 1 reply; 6+ messages in thread From: Khairul Anuar Romli @ 2025-11-18 1:11 UTC (permalink / raw) To: Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin, Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree, Khairul Anuar Romli Agilex5 introduces changes in how reserved memory is mapped and accessed compared to previous SoC generations. Agilex5 compatible allows stratix10- FPGA manager driver to handle these changes. Fallback is added for driver probe and init that rely on matching of table and DT node. Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> --- Changes in v4: - Remove redundant "items - enum" as suggested in v3. - Simplify compatible property to use contains instead of oneOf. - Validate fallback and non-fallback DT. Also validate binding with dt_binding_check. Changes in v3: - Add description for Agilex5 Device - Add and define fallback to "intel,agilex-soc-fpga-mgr" - Validate against Agilex and Stratix10 (non-fallback) and Agilex5 (fallback) Changes in v2: - No changes in this patch --- .../bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml index 6e536d6b28a9..65c737a4734c 100644 --- a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml +++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml @@ -20,9 +20,11 @@ description: properties: compatible: - enum: - - intel,stratix10-soc-fpga-mgr - - intel,agilex-soc-fpga-mgr + contains: + enum: + - intel,stratix10-soc-fpga-mgr + - intel,agilex-soc-fpga-mgr + - intel,agilex5-soc-fpga-mgr required: - compatible -- 2.43.7 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: fpga: stratix10: add support for Agilex5 2025-11-18 1:11 ` [PATCH v4 1/2] dt-bindings: fpga: stratix10: add " Khairul Anuar Romli @ 2025-11-18 19:07 ` Conor Dooley 2025-11-18 19:28 ` Krzysztof Kozlowski 0 siblings, 1 reply; 6+ messages in thread From: Conor Dooley @ 2025-11-18 19:07 UTC (permalink / raw) To: Khairul Anuar Romli Cc: Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin, Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 2240 bytes --] On Tue, Nov 18, 2025 at 09:11:42AM +0800, Khairul Anuar Romli wrote: > Agilex5 introduces changes in how reserved memory is mapped and accessed > compared to previous SoC generations. Agilex5 compatible allows stratix10- > FPGA manager driver to handle these changes. > > Fallback is added for driver probe and init that rely on matching of table > and DT node. > > Reviewed-by: Xu Yilun <yilun.xu@intel.com> > Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> > --- > Changes in v4: > - Remove redundant "items - enum" as suggested in v3. > - Simplify compatible property to use contains instead of oneOf. > - Validate fallback and non-fallback DT. Also validate binding with > dt_binding_check. What are you doing?? You've been told several times exactly what to do and yet you keep conjuring up completely random different things. Using contains instead of the oneOf construct that was being done before is *not* a simplification, it is functionally different. NAK. Go do what you were told to do. pw-bot: changes-requested > Changes in v3: > - Add description for Agilex5 Device > - Add and define fallback to "intel,agilex-soc-fpga-mgr" > - Validate against Agilex and Stratix10 (non-fallback) and Agilex5 > (fallback) > Changes in v2: > - No changes in this patch > --- > .../bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml > index 6e536d6b28a9..65c737a4734c 100644 > --- a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml > +++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml > @@ -20,9 +20,11 @@ description: > > properties: > compatible: > - enum: > - - intel,stratix10-soc-fpga-mgr > - - intel,agilex-soc-fpga-mgr > + contains: > + enum: > + - intel,stratix10-soc-fpga-mgr > + - intel,agilex-soc-fpga-mgr > + - intel,agilex5-soc-fpga-mgr > > required: > - compatible > -- > 2.43.7 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: fpga: stratix10: add support for Agilex5 2025-11-18 19:07 ` Conor Dooley @ 2025-11-18 19:28 ` Krzysztof Kozlowski 2025-11-18 23:01 ` Conor Dooley 0 siblings, 1 reply; 6+ messages in thread From: Krzysztof Kozlowski @ 2025-11-18 19:28 UTC (permalink / raw) To: Conor Dooley, Khairul Anuar Romli Cc: Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin, Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree On 18/11/2025 20:07, Conor Dooley wrote: > On Tue, Nov 18, 2025 at 09:11:42AM +0800, Khairul Anuar Romli wrote: >> Agilex5 introduces changes in how reserved memory is mapped and accessed >> compared to previous SoC generations. Agilex5 compatible allows stratix10- >> FPGA manager driver to handle these changes. >> >> Fallback is added for driver probe and init that rely on matching of table >> and DT node. >> >> Reviewed-by: Xu Yilun <yilun.xu@intel.com> >> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> >> --- >> Changes in v4: >> - Remove redundant "items - enum" as suggested in v3. >> - Simplify compatible property to use contains instead of oneOf. >> - Validate fallback and non-fallback DT. Also validate binding with >> dt_binding_check. > > What are you doing?? You've been told several times exactly what to do > and yet you keep conjuring up completely random different things. > Using contains instead of the oneOf construct that was being done before > is *not* a simplification, it is functionally different. > > NAK. Go do what you were told to do. There is no single file with that syntax, so I really do not understand why completely different syntax is reasonable for the author :/ Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: fpga: stratix10: add support for Agilex5 2025-11-18 19:28 ` Krzysztof Kozlowski @ 2025-11-18 23:01 ` Conor Dooley 0 siblings, 0 replies; 6+ messages in thread From: Conor Dooley @ 2025-11-18 23:01 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Khairul Anuar Romli, Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin, Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 1718 bytes --] On Tue, Nov 18, 2025 at 08:28:46PM +0100, Krzysztof Kozlowski wrote: > On 18/11/2025 20:07, Conor Dooley wrote: > > On Tue, Nov 18, 2025 at 09:11:42AM +0800, Khairul Anuar Romli wrote: > >> Agilex5 introduces changes in how reserved memory is mapped and accessed > >> compared to previous SoC generations. Agilex5 compatible allows stratix10- > >> FPGA manager driver to handle these changes. > >> > >> Fallback is added for driver probe and init that rely on matching of table > >> and DT node. > >> > >> Reviewed-by: Xu Yilun <yilun.xu@intel.com> > >> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> > >> --- > >> Changes in v4: > >> - Remove redundant "items - enum" as suggested in v3. > >> - Simplify compatible property to use contains instead of oneOf. > >> - Validate fallback and non-fallback DT. Also validate binding with > >> dt_binding_check. > > > > What are you doing?? You've been told several times exactly what to do > > and yet you keep conjuring up completely random different things. > > Using contains instead of the oneOf construct that was being done before > > is *not* a simplification, it is functionally different. > > > > NAK. Go do what you were told to do. > > There is no single file with that syntax, so I really do not understand > why completely different syntax is reasonable for the author :/ There are actually a handful of bindings that do it (14). Some are probably wrong, others are the generic portions of snps etc IP schemas. Run this if you wanna quickly see what's what: rg --multiline "^properties:\n.*compatible:\n.*contains" --context=5 I'd say that about half of them should be enums or const. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes 2025-11-18 1:11 [PATCH v4 0/2] Enable FPGA Manager support for Agilex5 Khairul Anuar Romli 2025-11-18 1:11 ` [PATCH v4 1/2] dt-bindings: fpga: stratix10: add " Khairul Anuar Romli @ 2025-11-18 1:11 ` Khairul Anuar Romli 1 sibling, 0 replies; 6+ messages in thread From: Khairul Anuar Romli @ 2025-11-18 1:11 UTC (permalink / raw) To: Moritz Fischer, Xu Yilun, Tom Rix, Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Mahesh Rao, Ho Yin, Niravkumar L Rabara, linux-fpga, linux-kernel, devicetree, Khairul Anuar Romli The Intel Agilex 5 SoC contains a programmable FPGA region that requires proper device tree description to enable FPGA manager support in the Linux kernel. The fpga-region node is introduced to support FPGA partial reconfiguration through the FPGA Manager framework. This node defines a region in the device tree that can be dynamically programmed at runtime. Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> --- Changes in v4: - No changes. - Validated with CHECK_DTBS=y as standalone and with intel,stratix10-soc-fpga-mgr.yaml Changes in v3: - tested with intel,stratix10-soc-fpga-mgr.yaml - Rephrase commit message to make it more concise. Changes in v2: - All fallback compatible string to ensure driver is still able to initialize without new compatible string added in the driver. --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index a5c2025a616e..1f5d560f97b2 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -85,9 +85,21 @@ svc { method = "smc"; memory-region = <&service_reserved>; iommus = <&smmu 10>; + + fpga_mgr: fpga-mgr { + compatible = "intel,agilex5-soc-fpga-mgr", + "intel,agilex-soc-fpga-mgr"; + }; }; }; + fpga-region { + compatible = "fpga-region"; + #address-cells = <0x2>; + #size-cells = <0x2>; + fpga-mgr = <&fpga_mgr>; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; -- 2.43.7 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-11-18 23:01 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-11-18 1:11 [PATCH v4 0/2] Enable FPGA Manager support for Agilex5 Khairul Anuar Romli 2025-11-18 1:11 ` [PATCH v4 1/2] dt-bindings: fpga: stratix10: add " Khairul Anuar Romli 2025-11-18 19:07 ` Conor Dooley 2025-11-18 19:28 ` Krzysztof Kozlowski 2025-11-18 23:01 ` Conor Dooley 2025-11-18 1:11 ` [PATCH v4 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr nodes Khairul Anuar Romli
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