From: Krzysztof Kozlowski <krzk@kernel.org>
To: iansdannapel@gmail.com, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-fpga@vger.kernel.org,
mdf@kernel.org, yilun.xu@intel.com, trix@redhat.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
heiko@sntech.de, neil.armstrong@linaro.org, mani@kernel.org,
kever.yang@rock-chips.com, dev@kael-k.io
Subject: Re: [PATCH v5 2/3] dt-bindings: fpga: Add Efinix SPI programming bindings
Date: Thu, 20 Nov 2025 15:12:57 +0100 [thread overview]
Message-ID: <f65506e6-ac29-449e-86b3-540c23ca6119@kernel.org> (raw)
In-Reply-To: <20251119184708.566461-3-iansdannapel@gmail.com>
On 19/11/2025 19:47, iansdannapel@gmail.com wrote:
> From: Ian Dannapel <iansdannapel@gmail.com>
>
> Add device tree bindings documentation for configuring Efinix FPGA
> using serial SPI passive programming mode.
>
> Signed-off-by: Ian Dannapel <iansdannapel@gmail.com>
> ---
> .../bindings/fpga/efinix,trion-spi.yaml | 77 +++++++++++++++++++
> 1 file changed, 77 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/fpga/efinix,trion-spi.yaml
>
> diff --git a/Documentation/devicetree/bindings/fpga/efinix,trion-spi.yaml b/Documentation/devicetree/bindings/fpga/efinix,trion-spi.yaml
> new file mode 100644
> index 000000000000..9ac37e5e5094
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/efinix,trion-spi.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/efinix,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Efinix SPI FPGA Manager
> +
> +maintainers:
> + - Ian Dannapel <iansdannapel@gmail.com>
> +
> +description: |
> + Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
> + through "SPI Passive Mode".
> + Note: Additional pins hogs for bus width configuration must be set
> + elsewhere, if necessary. Only bus width 1x serial is supported.
> +
> + References:
> + - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.3.pdf
> + - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.8.pdf
> + - https://www.efinixinc.com/docs/an061-configuring-topaz-fpgas-v1.1.pdf
> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - efinix,trion-spi
> + - efinix,titanium-spi
> + - efinix,topaz-spi
Nothing improved. You received comments about this - twice or more even
- so I feel like you just don't care about review.
NAK
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-11-20 14:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-19 18:47 [PATCH v5 0/3] Add Efinix FPGA SPI programming support iansdannapel
2025-11-19 18:47 ` [PATCH v5 1/3] dt-bindings: vendor-prefix: Add prefix for Efinix, Inc iansdannapel
2025-11-20 14:11 ` Krzysztof Kozlowski
2025-11-19 18:47 ` [PATCH v5 2/3] dt-bindings: fpga: Add Efinix SPI programming bindings iansdannapel
2025-11-19 20:33 ` Rob Herring (Arm)
2025-11-20 14:12 ` Krzysztof Kozlowski [this message]
2025-11-20 15:55 ` Ian Dannapel
2025-11-20 16:42 ` Krzysztof Kozlowski
2025-11-19 18:47 ` [PATCH v5 3/3] fpga-mgr: Add Efinix SPI programming driver iansdannapel
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