From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Andrew Morton <akpm@linux-foundation.org>,
Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Arnd Bergmann <arnd@arndb.de>, Oleg Nesterov <oleg@redhat.com>,
Eric Biederman <ebiederm@xmission.com>,
Shuah Khan <shuah@kernel.org>,
"Rick P. Edgecombe" <rick.p.edgecombe@intel.com>,
Deepak Gupta <debug@rivosinc.com>,
Ard Biesheuvel <ardb@kernel.org>,
Szabolcs Nagy <Szabolcs.Nagy@arm.com>,
Kees Cook <kees@kernel.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Florian Weimer <fweimer@redhat.com>,
Christian Brauner <brauner@kernel.org>,
Thiago Jung Bauermann <thiago.bauermann@linaro.org>,
Ross Burton <ross.burton@arm.com>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v10 23/40] arm64/signal: Set up and restore the GCS context for signal handlers
Date: Thu, 01 Aug 2024 13:06:50 +0100 [thread overview]
Message-ID: <20240801-arm64-gcs-v10-23-699e2bd2190b@kernel.org> (raw)
In-Reply-To: <20240801-arm64-gcs-v10-0-699e2bd2190b@kernel.org>
When invoking a signal handler we use the GCS configuration and stack
for the current thread.
Since we implement signal return by calling the signal handler with a
return address set up pointing to a trampoline in the vDSO we need to
also configure any active GCS for this by pushing a frame for the
trampoline onto the GCS. If we do not do this then signal return will
generate a GCS protection fault.
In order to guard against attempts to bypass GCS protections via signal
return we only allow returning with GCSPR_EL0 pointing to an address
where it was previously preempted by a signal. We do this by pushing a
cap onto the GCS, this takes the form of an architectural GCS cap token
with the top bit set and token type of 0 which we add on signal entry
and validate and pop off on signal return. The combination of the top
bit being set and the token type mean that this can't be interpreted as
a valid token or address.
Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/gcs.h | 1 +
arch/arm64/kernel/signal.c | 134 +++++++++++++++++++++++++++++++++++++++++--
arch/arm64/mm/gcs.c | 1 +
3 files changed, 131 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/gcs.h b/arch/arm64/include/asm/gcs.h
index 48c97e63e56a..f50660603ecf 100644
--- a/arch/arm64/include/asm/gcs.h
+++ b/arch/arm64/include/asm/gcs.h
@@ -9,6 +9,7 @@
#include <asm/uaccess.h>
struct kernel_clone_args;
+struct ksignal;
static inline void gcsb_dsync(void)
{
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index 4a77f4976e11..a1e0aa38bff9 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -25,6 +25,7 @@
#include <asm/elf.h>
#include <asm/exception.h>
#include <asm/cacheflush.h>
+#include <asm/gcs.h>
#include <asm/ucontext.h>
#include <asm/unistd.h>
#include <asm/fpsimd.h>
@@ -34,6 +35,37 @@
#include <asm/traps.h>
#include <asm/vdso.h>
+#ifdef CONFIG_ARM64_GCS
+/* Extra bit set in the address distinguishing a signal cap token. */
+#define GCS_SIGNAL_CAP_FLAG BIT(63)
+
+#define GCS_SIGNAL_CAP(addr) ((((unsigned long)addr) & GCS_CAP_ADDR_MASK) | \
+ GCS_SIGNAL_CAP_FLAG)
+
+static bool gcs_signal_cap_valid(u64 addr, u64 val)
+{
+ /*
+ * The top bit should be set, this is an invalid address for
+ * EL0 and will only be set for caps created by signals.
+ */
+ if (!(val & GCS_SIGNAL_CAP_FLAG))
+ return false;
+
+ /* The rest should be a standard architectural cap token. */
+ val &= ~GCS_SIGNAL_CAP_FLAG;
+
+ /* The cap must not have a token set */
+ if (GCS_CAP_TOKEN(val) != 0)
+ return false;
+
+ /* The cap must store the VA the cap was stored at */
+ if (GCS_CAP_ADDR(addr) != GCS_CAP_ADDR(val))
+ return false;
+
+ return true;
+}
+#endif
+
/*
* Do a signal return; undo the signal stack. These are aligned to 128-bit.
*/
@@ -860,6 +892,50 @@ static int restore_sigframe(struct pt_regs *regs,
return err;
}
+#ifdef CONFIG_ARM64_GCS
+static int gcs_restore_signal(void)
+{
+ u64 gcspr_el0, cap;
+ int ret;
+
+ if (!system_supports_gcs())
+ return 0;
+
+ if (!(current->thread.gcs_el0_mode & PR_SHADOW_STACK_ENABLE))
+ return 0;
+
+ gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
+
+ /*
+ * GCSPR_EL0 should be pointing at a capped GCS, read the cap...
+ */
+ gcsb_dsync();
+ ret = copy_from_user(&cap, (__user void*)gcspr_el0, sizeof(cap));
+ if (ret)
+ return -EFAULT;
+
+ /*
+ * ...then check that the cap is the actual GCS before
+ * restoring it.
+ */
+ if (!gcs_signal_cap_valid(gcspr_el0, cap))
+ return -EINVAL;
+
+ /* Invalidate the token to prevent reuse */
+ put_user_gcs(0, (__user void*)gcspr_el0, &ret);
+ if (ret != 0)
+ return -EFAULT;
+
+ current->thread.gcspr_el0 = gcspr_el0 + sizeof(cap);
+ write_sysreg_s(current->thread.gcspr_el0, SYS_GCSPR_EL0);
+
+ return 0;
+}
+
+#else
+static int gcs_restore_signal(void) { return 0; }
+#endif
+
SYSCALL_DEFINE0(rt_sigreturn)
{
struct pt_regs *regs = current_pt_regs();
@@ -886,6 +962,9 @@ SYSCALL_DEFINE0(rt_sigreturn)
if (restore_altstack(&frame->uc.uc_stack))
goto badframe;
+ if (gcs_restore_signal())
+ goto badframe;
+
return regs->regs[0];
badframe:
@@ -1130,7 +1209,50 @@ static int get_sigframe(struct rt_sigframe_user_layout *user,
return 0;
}
-static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
+#ifdef CONFIG_ARM64_GCS
+
+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)
+{
+ unsigned long __user *gcspr_el0;
+ int ret = 0;
+
+ if (!system_supports_gcs())
+ return 0;
+
+ if (!task_gcs_el0_enabled(current))
+ return 0;
+
+ /*
+ * We are entering a signal handler, current register state is
+ * active.
+ */
+ gcspr_el0 = (unsigned long __user *)read_sysreg_s(SYS_GCSPR_EL0);
+
+ /*
+ * Push a cap and the GCS entry for the trampoline onto the GCS.
+ */
+ put_user_gcs((unsigned long)sigtramp, gcspr_el0 - 2, &ret);
+ put_user_gcs(GCS_SIGNAL_CAP(gcspr_el0 - 1), gcspr_el0 - 1, &ret);
+ if (ret != 0)
+ return ret;
+
+ gcsb_dsync();
+
+ gcspr_el0 -= 2;
+ write_sysreg_s((unsigned long)gcspr_el0, SYS_GCSPR_EL0);
+
+ return 0;
+}
+#else
+
+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)
+{
+ return 0;
+}
+
+#endif
+
+static int setup_return(struct pt_regs *regs, struct ksignal *ksig,
struct rt_sigframe_user_layout *user, int usig)
{
__sigrestore_t sigtramp;
@@ -1138,7 +1260,7 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
regs->regs[0] = usig;
regs->sp = (unsigned long)user->sigframe;
regs->regs[29] = (unsigned long)&user->next_frame->fp;
- regs->pc = (unsigned long)ka->sa.sa_handler;
+ regs->pc = (unsigned long)ksig->ka.sa.sa_handler;
/*
* Signal delivery is a (wacky) indirect function call in
@@ -1178,12 +1300,14 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
sme_smstop();
}
- if (ka->sa.sa_flags & SA_RESTORER)
- sigtramp = ka->sa.sa_restorer;
+ if (ksig->ka.sa.sa_flags & SA_RESTORER)
+ sigtramp = ksig->ka.sa.sa_restorer;
else
sigtramp = VDSO_SYMBOL(current->mm->context.vdso, sigtramp);
regs->regs[30] = (unsigned long)sigtramp;
+
+ return gcs_signal_entry(sigtramp, ksig);
}
static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
@@ -1206,7 +1330,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
err |= __save_altstack(&frame->uc.uc_stack, regs->sp);
err |= setup_sigframe(&user, regs, set);
if (err == 0) {
- setup_return(regs, &ksig->ka, &user, usig);
+ err = setup_return(regs, ksig, &user, usig);
if (ksig->ka.sa.sa_flags & SA_SIGINFO) {
err |= copy_siginfo_to_user(&frame->info, &ksig->info);
regs->regs[1] = (unsigned long)&frame->info;
diff --git a/arch/arm64/mm/gcs.c b/arch/arm64/mm/gcs.c
index 6703c70581a4..30614f4ad164 100644
--- a/arch/arm64/mm/gcs.c
+++ b/arch/arm64/mm/gcs.c
@@ -6,6 +6,7 @@
#include <linux/types.h>
#include <asm/cpufeature.h>
+#include <asm/gcs.h>
#include <asm/page.h>
static unsigned long alloc_gcs(unsigned long addr, unsigned long size)
--
2.39.2
next prev parent reply other threads:[~2024-08-01 12:59 UTC|newest]
Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-01 12:06 [PATCH v10 00/40] arm64/gcs: Provide support for GCS in userspace Mark Brown
2024-08-01 12:06 ` [PATCH v10 01/40] arm64/mm: Restructure arch_validate_flags() for extensibility Mark Brown
2024-08-15 10:39 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 02/40] prctl: arch-agnostic prctl for shadow stack Mark Brown
2024-08-15 10:42 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 03/40] mman: Add map_shadow_stack() flags Mark Brown
2024-08-15 15:45 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 04/40] arm64: Document boot requirements for Guarded Control Stacks Mark Brown
2024-08-15 17:00 ` Catalin Marinas
2024-08-15 18:14 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 05/40] arm64/gcs: Document the ABI " Mark Brown
2024-08-16 11:09 ` Catalin Marinas
2024-08-16 12:02 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 06/40] arm64/sysreg: Add definitions for architected GCS caps Mark Brown
2024-08-16 11:10 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 07/40] arm64/gcs: Add manual encodings of GCS instructions Mark Brown
2024-08-16 11:10 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 08/40] arm64/gcs: Provide put_user_gcs() Mark Brown
2024-08-16 11:12 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 09/40] arm64/gcs: Provide basic EL2 setup to allow GCS usage at EL0 and EL1 Mark Brown
2024-08-16 11:13 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 10/40] arm64/cpufeature: Runtime detection of Guarded Control Stack (GCS) Mark Brown
2024-08-16 11:15 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 11/40] arm64/mm: Allocate PIE slots for EL0 guarded control stack Mark Brown
2024-08-16 14:16 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 12/40] mm: Define VM_SHADOW_STACK for arm64 when we support GCS Mark Brown
2024-08-15 15:20 ` Edgecombe, Rick P
2024-08-15 15:26 ` Mark Brown
2024-08-15 16:39 ` Mark Brown
2024-08-15 17:53 ` Edgecombe, Rick P
2024-08-15 18:19 ` Mark Brown
2024-08-16 13:59 ` Edgecombe, Rick P
2024-08-19 9:07 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 13/40] arm64/mm: Map pages for guarded control stack Mark Brown
2024-08-19 9:10 ` Catalin Marinas
2024-08-19 16:33 ` Mark Brown
2024-08-20 14:59 ` Catalin Marinas
2024-08-20 15:28 ` Mark Brown
2024-08-20 17:30 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 14/40] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2024-08-16 14:15 ` Marc Zyngier
2024-08-16 14:40 ` Mark Brown
2024-08-16 14:52 ` Marc Zyngier
2024-08-01 12:06 ` [PATCH v10 15/40] arm64/idreg: Add overrride for GCS Mark Brown
2024-08-19 9:10 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 16/40] arm64/hwcap: Add hwcap " Mark Brown
2024-08-19 9:12 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 17/40] arm64/traps: Handle GCS exceptions Mark Brown
2024-08-19 9:12 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 18/40] arm64/mm: Handle GCS data aborts Mark Brown
2024-08-19 9:17 ` Catalin Marinas
2024-08-19 15:14 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 19/40] arm64/gcs: Context switch GCS state for EL0 Mark Brown
2024-08-19 11:46 ` Catalin Marinas
2024-08-19 15:44 ` Mark Brown
2024-08-20 17:07 ` Catalin Marinas
2024-08-20 17:56 ` Mark Brown
2024-08-21 8:50 ` Catalin Marinas
2024-08-21 12:48 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 20/40] arm64/gcs: Ensure that new threads have a GCS Mark Brown
2024-08-19 12:04 ` Catalin Marinas
2024-08-19 15:57 ` Mark Brown
2024-08-20 17:28 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 21/40] arm64/gcs: Implement shadow stack prctl() interface Mark Brown
2024-08-21 12:54 ` Catalin Marinas
2024-08-21 13:41 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 22/40] arm64/mm: Implement map_shadow_stack() Mark Brown
2024-08-21 15:36 ` Catalin Marinas
2024-08-01 12:06 ` Mark Brown [this message]
2024-08-14 14:51 ` [PATCH v10 23/40] arm64/signal: Set up and restore the GCS context for signal handlers Dave Martin
2024-08-14 16:00 ` Mark Brown
2024-08-15 13:37 ` Dave Martin
2024-08-15 14:45 ` Mark Brown
2024-08-15 15:11 ` Dave Martin
2024-08-15 15:29 ` Mark Brown
2024-08-15 16:31 ` Dave Martin
2024-08-21 17:28 ` Catalin Marinas
2024-08-21 18:03 ` Mark Brown
2024-08-21 18:18 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 24/40] arm64/signal: Expose GCS state in signal frames Mark Brown
2024-08-14 15:09 ` Dave Martin
2024-08-14 16:21 ` Mark Brown
2024-08-15 14:01 ` Dave Martin
2024-08-15 15:05 ` Mark Brown
2024-08-15 15:33 ` Dave Martin
2024-08-15 15:46 ` Mark Brown
2024-08-15 16:40 ` Dave Martin
2024-08-21 17:40 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 25/40] arm64/ptrace: Expose GCS via ptrace and core files Mark Brown
2024-08-21 17:57 ` Catalin Marinas
2024-08-21 18:27 ` Mark Brown
2024-08-21 18:41 ` Mark Brown
2024-08-01 12:06 ` [PATCH v10 26/40] arm64: Add Kconfig for Guarded Control Stack (GCS) Mark Brown
2024-08-21 17:58 ` Catalin Marinas
2024-08-01 12:06 ` [PATCH v10 27/40] kselftest/arm64: Verify the GCS hwcap Mark Brown
2024-08-07 22:22 ` Thiago Jung Bauermann
2024-08-01 12:06 ` [PATCH v10 28/40] kselftest: Provide shadow stack enable helpers for arm64 Mark Brown
2024-08-01 12:06 ` [PATCH v10 29/40] selftests/clone3: Enable arm64 shadow stack testing Mark Brown
2024-08-07 22:26 ` Thiago Jung Bauermann
2024-08-01 12:06 ` [PATCH v10 30/40] kselftest/arm64: Add GCS as a detected feature in the signal tests Mark Brown
2024-08-01 12:06 ` [PATCH v10 31/40] kselftest/arm64: Add framework support for GCS to signal handling tests Mark Brown
2024-08-01 12:06 ` [PATCH v10 32/40] kselftest/arm64: Allow signals tests to specify an expected si_code Mark Brown
2024-08-01 12:07 ` [PATCH v10 33/40] kselftest/arm64: Always run signals tests with GCS enabled Mark Brown
2024-08-01 12:07 ` [PATCH v10 34/40] kselftest/arm64: Add very basic GCS test program Mark Brown
2024-08-07 22:31 ` Thiago Jung Bauermann
2024-08-01 12:07 ` [PATCH v10 35/40] kselftest/arm64: Add a GCS test program built with the system libc Mark Brown
2024-08-07 22:32 ` Thiago Jung Bauermann
2024-08-01 12:07 ` [PATCH v10 36/40] kselftest/arm64: Add test coverage for GCS mode locking Mark Brown
2024-08-07 22:34 ` Thiago Jung Bauermann
2024-08-01 12:07 ` [PATCH v10 37/40] kselftest/arm64: Add GCS signal tests Mark Brown
2024-08-07 22:36 ` Thiago Jung Bauermann
2024-08-01 12:07 ` [PATCH v10 38/40] kselftest/arm64: Add a GCS stress test Mark Brown
2024-08-07 22:39 ` Thiago Jung Bauermann
2024-08-07 23:10 ` Mark Brown
2024-08-08 6:23 ` Thiago Jung Bauermann
2024-08-08 8:18 ` Mark Brown
2024-08-01 12:07 ` [PATCH v10 39/40] kselftest/arm64: Enable GCS for the FP stress tests Mark Brown
2024-08-08 6:25 ` Thiago Jung Bauermann
2024-08-01 12:07 ` [PATCH v10 40/40] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
2024-08-02 16:03 ` [PATCH v10 00/40] arm64/gcs: Provide support for GCS in userspace Anders Roxell
2024-08-16 14:06 ` Marc Zyngier
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