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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646d1391sm147960395e9.9.2025.06.24.09.50.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jun 2025 09:50:05 -0700 (PDT) Date: Tue, 24 Jun 2025 17:50:01 +0100 From: David Laight To: Segher Boessenkool Cc: Christophe Leroy , Michael Ellerman , Nicholas Piggin , Naveen N Rao , Madhavan Srinivasan , Alexander Viro , Christian Brauner , Jan Kara , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Darren Hart , Davidlohr Bueso , Andre Almeida , Andrew Morton , Dave Hansen , Linus Torvalds , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH 0/5] powerpc: Implement masked user access Message-ID: <20250624175001.148a768f@pumpkin> In-Reply-To: <20250624131714.GG17294@gate.crashing.org> References: <20250622172043.3fb0e54c@pumpkin> <20250624131714.GG17294@gate.crashing.org> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-fsdevel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 24 Jun 2025 08:17:14 -0500 Segher Boessenkool wrote: > On Tue, Jun 24, 2025 at 07:27:47AM +0200, Christophe Leroy wrote: > > Ah ok, I overlooked that, I didn't know the cmove instruction, seem > > similar to the isel instruction on powerpc e500. > > cmove does a move (register or memory) when some condition is true. The destination of x86 'cmov' is always a register (only the source can be memory - an is probably always read). It is a also a computational instruction. It may well always do the register write - hard to detect. There is a planned new instruction that would do a conditional write to memory - but not on any cpu yet. > isel (which is base PowerPC, not something "e500" only) is a > computational instruction, it copies one of two registers to a third, > which of the two is decided by any bit in the condition register. Does that mean it could be used for all the ppc cpu variants? > But sure, seen from very far off both isel and cmove can be used to > implement the ternary operator ("?:"), are similar in that way :-) Which is exactly what you want to avoid speculation. David > > > Segher