From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8BDCC433ED for ; Fri, 16 Apr 2021 14:10:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BBE7C611AF for ; Fri, 16 Apr 2021 14:10:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235658AbhDPOLI (ORCPT ); Fri, 16 Apr 2021 10:11:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:53592 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235553AbhDPOLH (ORCPT ); Fri, 16 Apr 2021 10:11:07 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id B3E8E611C2; Fri, 16 Apr 2021 14:10:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1618582242; bh=1s9sCrJo44Veolfwl+MwQWl66gowBJVDh4jCcMWmw20=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=bWtljR/0v+ciclhWmYZDIUGhhvFJ3qQ7nO0uU82MghhOsGFdSMyacApx9Rv+nHL6X W5cY5QnPwP6g7dxd13lON+NP7T3wxEgswnDncwfQXbUpDa1noe9/ic1qeaxTeqr1An xJUGxVeiTwbDQol4BcT+uJeJ/K8GtjgPzMatA+QGLBn8/pwaCrhafWYek6SKXGeGJX JrnAkRBsacpGTrsZXVT6wqIi5rnqa1PtXSpagwrGhkYyDEvybabUi7RBZVXZcudA+H 4dZgdBI6yZkxxw1SMBUj5RKBCe9Uqk2xt0sX7dm9fywiRJ0wfW8Bx5Y3FStVzaPeVS VyQ7HbK3kn2jA== Received: by mail-wm1-f46.google.com with SMTP id n10-20020a05600c4f8ab0290130f0d3cba3so2452761wmq.1; Fri, 16 Apr 2021 07:10:42 -0700 (PDT) X-Gm-Message-State: AOAM5311rO2I/o6Ind6RThkqpjvCAbINqe/V2ca2Zxn0e895bpA76IE+ pQhj8cZzVF3wdYjF0bFkNNhn6QVSWsiGrmNBMrQ= X-Google-Smtp-Source: ABdhPJwer78kcpt2KUTk7pLNWv4YpxxYqG4ncdMLFchwkUndSOMZjtA8z9tZUxzlPor4R9hASXWQZTamma1KWyeXMwk= X-Received: by 2002:a7b:c14a:: with SMTP id z10mr8250595wmi.75.1618582241293; Fri, 16 Apr 2021 07:10:41 -0700 (PDT) MIME-Version: 1.0 References: <20210409185105.188284-3-willy@infradead.org> <202104100656.N7EVvkNZ-lkp@intel.com> <20210410024313.GX2531743@casper.infradead.org> <20210410082158.79ad09a6@carbon> In-Reply-To: From: Arnd Bergmann Date: Fri, 16 Apr 2021 16:10:37 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: Bogus struct page layout on 32-bit To: Grygorii Strashko Cc: Ilias Apalodimas , Jesper Dangaard Brouer , Christoph Hellwig , Matthew Wilcox , kernel test robot , Linux-MM , kbuild-all@lists.01.org, clang-built-linux@googlegroups.com, open list , linux-fsdevel@vger.kernel.org, Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , linuxppc-dev@lists.ozlabs.org, Linux ARM , "David S. Miller" , Matteo Croce , "netdev@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org On Fri, Apr 16, 2021 at 11:27 AM 'Grygorii Strashko' via Clang Built Linux wrote: > On 10/04/2021 11:52, Ilias Apalodimas wrote: > > +CC Grygorii for the cpsw part as Ivan's email is not valid anymore > The TI platforms am3/4/5 (cpsw) and Keystone 2 (netcp) can do only 32bit DMA even in case of LPAE (dma-ranges are used). > Originally, as I remember, CONFIG_ARCH_DMA_ADDR_T_64BIT has not been selected for the LPAE case > on TI platforms and the fact that it became set is the result of multi-paltform/allXXXconfig/DMA > optimizations and unification. > (just checked - not set in 4.14) > > Probable commit 4965a68780c5 ("arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/Kconfig"). I completely missed this change in the past, and I don't really agree with it either. Most 32-bit Arm platforms are in fact limited to 32-bit DMA, even when they have MMIO or RAM areas above the 4GB boundary that require LPAE. > The TI drivers have been updated, finally to accept ARCH_DMA_ADDR_T_64BIT=y by using > things like (__force u32) for example. > > Honestly, I've done sanity check of CPSW with LPAE=y (ARCH_DMA_ADDR_T_64BIT=y) very long time ago. This is of course a good idea, drivers should work with any combination of 32-bit or 64-bit phys_addr_t and dma_addr_t. Arnd