From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Dmitry Adamushko" <dmitry.adamushko@gmail.com>
Subject: Re: O_DIRECT patch for processors with VIPT cache for mainline kernel (specifically arm in our case)
Date: Thu, 20 Nov 2008 13:28:03 +0100
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	 <200811191740.23638.nickpiggin@yahoo.com.au>
	 <20081119204315.GB17209@flint.arm.linux.org.uk>
	 <200811201759.01039.nickpiggin@yahoo.com.au>
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Cc: "Russell King - ARM Linux" <linux@arm.linux.org.uk>,
	linux-fsdevel@vger.kernel.org,
	"Naval Saini" <navalnovel@gmail.com>, linux-arch@vger.kernel.org,
	linux-arm-kernel@lists.arm.linux.org.uk,
	linux-kernel@vger.kernel.org, naval.saini@nxp.com,
	"Ralf Baechle" <ralf@linux-mips.org>
To: "Nick Piggin" <nickpiggin@yahoo.com.au>
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2008/11/20 Nick Piggin <nickpiggin@yahoo.com.au>:
>
> [ ... ]
>
> - The page is sent to the block layer, which stores into the page. Some
>  block devices like 'brd' will potentially store via the kernel linear map
>  here, and they probably don't do enough cache flushing.

btw., if someone is curious, here is another case of what may happen
on VIPT systems when someone uses a "virtual" block device (like
'brd') as, heh, a swap :-)

http://www.linux-mips.org/archives/linux-mips/2008-11/msg00038.html


-- 
Best regards,
Dmitry Adamushko