From: "Koralahalli Channabasappa, Smita" <skoralah@amd.com>
To: Dave Jiang <dave.jiang@intel.com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
nvdimm@lists.linux.dev, linux-fsdevel@vger.kernel.org,
linux-pm@vger.kernel.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Matthew Wilcox <willy@infradead.org>, Jan Kara <jack@suse.cz>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@kernel.org>,
Li Ming <ming.li@zohomail.com>,
Jeff Johnson <jeff.johnson@oss.qualcomm.com>,
Ying Huang <huang.ying.caritas@gmail.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Peter Zijlstra <peterz@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Nathan Fontenot <nathan.fontenot@amd.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>,
Benjamin Cheatham <benjamin.cheatham@amd.com>,
Zhijian Li <lizhijian@fujitsu.com>,
Borislav Petkov <bp@alien8.de>,
Tomasz Wolski <tomasz.wolski@fujitsu.com>
Subject: Re: [PATCH v6 8/9] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges
Date: Fri, 20 Feb 2026 11:54:48 -0800 [thread overview]
Message-ID: <fccb20c6-545b-4eee-b0ed-3b58f228f089@amd.com> (raw)
In-Reply-To: <9c1994f1-7387-4d63-a678-8fd46a0310d1@intel.com>
On 2/18/2026 10:05 AM, Dave Jiang wrote:
>
>
> On 2/9/26 11:45 PM, Smita Koralahalli wrote:
>> The current probe time ownership check for Soft Reserved memory based
>> solely on CXL window intersection is insufficient. dax_hmem probing is not
>> always guaranteed to run after CXL enumeration and region assembly, which
>> can lead to incorrect ownership decisions before the CXL stack has
>> finished publishing windows and assembling committed regions.
>>
>> Introduce deferred ownership handling for Soft Reserved ranges that
>> intersect CXL windows. When such a range is encountered during dax_hmem
>> probe, schedule deferred work and wait for the CXL stack to complete
>> enumeration and region assembly before deciding ownership.
>>
>> Evaluate ownership of Soft Reserved ranges based on CXL region
>> containment.
>>
>> - If all Soft Reserved ranges are fully contained within committed CXL
>> regions, DROP handling Soft Reserved ranges from dax_hmem and allow
>> dax_cxl to bind.
>>
>> - If any Soft Reserved range is not fully claimed by committed CXL
>> region, REGISTER the Soft Reserved ranges with dax_hmem.
>>
>> Use dax_cxl_mode to coordinate ownership decisions for Soft Reserved
>> ranges. Once, ownership resolution is complete, flush the deferred work
>> from dax_cxl before allowing dax_cxl to bind.
>>
>> This enforces a strict ownership. Either CXL fully claims the Soft
>> reserved ranges or it relinquishes it entirely.
>>
>> Co-developed-by: Dan Williams <dan.j.williams@intel.com>
>> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
>> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
>> ---
>> drivers/dax/bus.c | 3 ++
>> drivers/dax/bus.h | 19 ++++++++++
>> drivers/dax/cxl.c | 1 +
>> drivers/dax/hmem/hmem.c | 78 +++++++++++++++++++++++++++++++++++++++--
>> 4 files changed, 99 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/dax/bus.c b/drivers/dax/bus.c
>> index 92b88952ede1..81985bcc70f9 100644
>> --- a/drivers/dax/bus.c
>> +++ b/drivers/dax/bus.c
>> @@ -25,6 +25,9 @@ DECLARE_RWSEM(dax_region_rwsem);
>> */
>> DECLARE_RWSEM(dax_dev_rwsem);
>>
>> +enum dax_cxl_mode dax_cxl_mode = DAX_CXL_MODE_DEFER;
>> +EXPORT_SYMBOL_NS_GPL(dax_cxl_mode, "CXL");
>> +
>> static DEFINE_MUTEX(dax_hmem_lock);
>> static dax_hmem_deferred_fn hmem_deferred_fn;
>> static void *dax_hmem_data;
>> diff --git a/drivers/dax/bus.h b/drivers/dax/bus.h
>> index b58a88e8089c..82616ff52fd1 100644
>> --- a/drivers/dax/bus.h
>> +++ b/drivers/dax/bus.h
>> @@ -41,6 +41,25 @@ struct dax_device_driver {
>> void (*remove)(struct dev_dax *dev);
>> };
>>
>> +/*
>> + * enum dax_cxl_mode - State machine to determine ownership for CXL
>> + * tagged Soft Reserved memory ranges.
>> + * @DAX_CXL_MODE_DEFER: Ownership resolution pending. Set while waiting
>> + * for CXL enumeration and region assembly to complete.
>> + * @DAX_CXL_MODE_REGISTER: CXL regions do not fully cover Soft Reserved
>> + * ranges. Fall back to registering those ranges via dax_hmem.
>> + * @DAX_CXL_MODE_DROP: All Soft Reserved ranges intersecting CXL windows
>> + * are fully contained within committed CXL regions. Drop HMEM handling
>> + * and allow dax_cxl to bind.
>> + */
>> +enum dax_cxl_mode {
>> + DAX_CXL_MODE_DEFER,
>> + DAX_CXL_MODE_REGISTER,
>> + DAX_CXL_MODE_DROP,
>> +};
>> +
>> +extern enum dax_cxl_mode dax_cxl_mode;
>> +
>> typedef void (*dax_hmem_deferred_fn)(void *data);
>>
>> int dax_hmem_register_work(dax_hmem_deferred_fn fn, void *data);
>> diff --git a/drivers/dax/cxl.c b/drivers/dax/cxl.c
>> index a2136adfa186..3ab39b77843d 100644
>> --- a/drivers/dax/cxl.c
>> +++ b/drivers/dax/cxl.c
>> @@ -44,6 +44,7 @@ static struct cxl_driver cxl_dax_region_driver = {
>>
>> static void cxl_dax_region_driver_register(struct work_struct *work)
>> {
>> + dax_hmem_flush_work();
>> cxl_driver_register(&cxl_dax_region_driver);
>> }
>>
>> diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c
>> index 1e3424358490..85854e25254b 100644
>> --- a/drivers/dax/hmem/hmem.c
>> +++ b/drivers/dax/hmem/hmem.c
>> @@ -3,6 +3,7 @@
>> #include <linux/memregion.h>
>> #include <linux/module.h>
>> #include <linux/dax.h>
>> +#include <cxl/cxl.h>
>> #include "../bus.h"
>>
>> static bool region_idle;
>> @@ -69,8 +70,18 @@ static int hmem_register_device(struct device *host, int target_nid,
>> if (IS_ENABLED(CONFIG_DEV_DAX_CXL) &&
>> region_intersects(res->start, resource_size(res), IORESOURCE_MEM,
>> IORES_DESC_CXL) != REGION_DISJOINT) {
>> - dev_dbg(host, "deferring range to CXL: %pr\n", res);
>> - return 0;
>> + switch (dax_cxl_mode) {
>> + case DAX_CXL_MODE_DEFER:
>> + dev_dbg(host, "deferring range to CXL: %pr\n", res);
>> + dax_hmem_queue_work();
>> + return 0;
>> + case DAX_CXL_MODE_REGISTER:
>> + dev_dbg(host, "registering CXL range: %pr\n", res);
>> + break;
>> + case DAX_CXL_MODE_DROP:
>> + dev_dbg(host, "dropping CXL range: %pr\n", res);
>> + return 0;
>> + }
>> }
>>
>> rc = region_intersects_soft_reserve(res->start, resource_size(res));
>> @@ -123,8 +134,70 @@ static int hmem_register_device(struct device *host, int target_nid,
>> return rc;
>> }
>>
>> +static int hmem_register_cxl_device(struct device *host, int target_nid,
>> + const struct resource *res)
>> +{
>> + if (region_intersects(res->start, resource_size(res), IORESOURCE_MEM,
>> + IORES_DESC_CXL) != REGION_DISJOINT)
>> + return hmem_register_device(host, target_nid, res);
>> +
>> + return 0;
>> +}
>> +
>> +static int soft_reserve_has_cxl_match(struct device *host, int target_nid,
>> + const struct resource *res)
>> +{
>> + if (region_intersects(res->start, resource_size(res), IORESOURCE_MEM,
>> + IORES_DESC_CXL) != REGION_DISJOINT) {
>> + if (!cxl_region_contains_soft_reserve((struct resource *)res))
>> + return 1;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void process_defer_work(void *data)
>> +{
>> + struct platform_device *pdev = data;
>> + int rc;
>> +
>> + /* relies on cxl_acpi and cxl_pci having had a chance to load */
>> + wait_for_device_probe();
>> +
>> + rc = walk_hmem_resources(&pdev->dev, soft_reserve_has_cxl_match);
>> +
>> + if (!rc) {
>> + dax_cxl_mode = DAX_CXL_MODE_DROP;
>> + dev_dbg(&pdev->dev, "All Soft Reserved ranges claimed by CXL\n");
>> + } else {
>> + dax_cxl_mode = DAX_CXL_MODE_REGISTER;
>> + dev_warn(&pdev->dev,
>> + "Soft Reserved not fully contained in CXL; using HMEM\n");
>> + }
>> +
>> + walk_hmem_resources(&pdev->dev, hmem_register_cxl_device);
>> +}
>> +
>> +static void kill_defer_work(void *data)
>> +{
>> + struct platform_device *pdev = data;
>> +
>> + dax_hmem_flush_work();
>> + dax_hmem_unregister_work(process_defer_work, pdev);
>> +}
>> +
>> static int dax_hmem_platform_probe(struct platform_device *pdev)
>> {
>> + int rc;
>> +
>> + rc = dax_hmem_register_work(process_defer_work, pdev);
>
> Do we need to take a reference on pdev when we queue the work?
>
> DJ
I thought it might not be required. But correct me if I'm wrong.
There is only one hmem_platform device. Also devm_add_action_or_reset()
registers kill_defer_work(), which calls flush_work() before the device
is torn down. So pdev cannot be freed while the deferred work is still
in progress. flush_work() blocks until process_defer_work() has fully
returned, and only then does device removal proceed.
But this needs a deadlock fix which Gregory pointed. If probe fails
after work is already queued, the devres cleanup calls flush_work()
which blocks on wait_for_device_probe() while still inside probe
context. I will fix in v7.
Thanks
Smita
>
>> + if (rc)
>> + return rc;
>> +
>> + rc = devm_add_action_or_reset(&pdev->dev, kill_defer_work, pdev);
>> + if (rc)
>> + return rc;
>> +
>> return walk_hmem_resources(&pdev->dev, hmem_register_device);
>> }
>>
>> @@ -174,3 +247,4 @@ MODULE_ALIAS("platform:hmem_platform*");
>> MODULE_DESCRIPTION("HMEM DAX: direct access to 'specific purpose' memory");
>> MODULE_LICENSE("GPL v2");
>> MODULE_AUTHOR("Intel Corporation");
>> +MODULE_IMPORT_NS("CXL");
>
next prev parent reply other threads:[~2026-02-20 19:54 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 6:44 [PATCH v6 0/9] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM Smita Koralahalli
2026-02-10 6:44 ` [PATCH v6 1/9] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges Smita Koralahalli
2026-02-19 3:22 ` Alison Schofield
2026-02-10 6:44 ` [PATCH v6 2/9] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL Smita Koralahalli
2026-02-19 3:23 ` Alison Schofield
2026-02-10 6:44 ` [PATCH v6 3/9] cxl/region: Skip decoder reset on detach for autodiscovered regions Smita Koralahalli
2026-02-19 3:44 ` Alison Schofield
2026-02-20 20:35 ` Koralahalli Channabasappa, Smita
2026-03-11 21:37 ` Dan Williams
2026-03-12 19:53 ` Dan Williams
2026-03-12 21:28 ` Koralahalli Channabasappa, Smita
2026-03-13 12:54 ` Alejandro Lucero Palau
2026-03-17 2:14 ` Dan Williams
2026-03-18 7:33 ` Alejandro Lucero Palau
2026-03-18 21:49 ` Dave Jiang
2026-03-18 21:27 ` Alison Schofield
2026-03-24 14:06 ` Alejandro Lucero Palau
2026-03-24 19:46 ` Dan Williams
2026-03-24 22:23 ` Alejandro Lucero Palau
2026-03-25 1:51 ` Alison Schofield
2026-02-10 6:44 ` [PATCH v6 4/9] dax/cxl, hmem: Initialize hmem early and defer dax_cxl binding Smita Koralahalli
2026-02-18 15:54 ` Dave Jiang
2026-03-09 14:31 ` Jonathan Cameron
2026-02-10 6:44 ` [PATCH v6 5/9] dax: Track all dax_region allocations under a global resource tree Smita Koralahalli
2026-02-18 16:04 ` Dave Jiang
2026-03-09 14:37 ` Jonathan Cameron
2026-03-12 21:30 ` Koralahalli Channabasappa, Smita
2026-03-12 0:27 ` Dan Williams
2026-03-12 21:31 ` Koralahalli Channabasappa, Smita
2026-02-10 6:44 ` [PATCH v6 6/9] cxl/region: Add helper to check Soft Reserved containment by CXL regions Smita Koralahalli
2026-03-12 0:29 ` Dan Williams
2026-02-10 6:44 ` [PATCH v6 7/9] dax: Add deferred-work helpers for dax_hmem and dax_cxl coordination Smita Koralahalli
2026-02-18 17:52 ` Dave Jiang
2026-02-20 0:02 ` Koralahalli Channabasappa, Smita
2026-02-20 15:55 ` Dave Jiang
2026-03-09 14:49 ` Jonathan Cameron
2026-02-10 6:45 ` [PATCH v6 8/9] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges Smita Koralahalli
2026-02-18 18:05 ` Dave Jiang
2026-02-20 19:54 ` Koralahalli Channabasappa, Smita [this message]
2026-02-20 10:14 ` Alejandro Lucero Palau
2026-03-12 2:28 ` Dan Williams
2026-03-13 18:41 ` Koralahalli Channabasappa, Smita
2026-03-17 2:36 ` Dan Williams
2026-03-16 22:26 ` Koralahalli Channabasappa, Smita
2026-03-17 2:42 ` Dan Williams
2026-02-10 6:45 ` [PATCH v6 9/9] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree Smita Koralahalli
2026-02-10 19:16 ` [PATCH v6 0/9] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM Alison Schofield
2026-02-10 19:49 ` Koralahalli Channabasappa, Smita
2026-02-12 6:38 ` Alison Schofield
2026-02-20 21:00 ` Koralahalli Channabasappa, Smita
2026-02-12 14:44 ` Tomasz Wolski
2026-02-12 21:18 ` Alison Schofield
2026-02-13 7:47 ` Yasunori Goto (Fujitsu)
2026-02-13 17:31 ` Alison Schofield
2026-02-16 5:15 ` Yasunori Goto (Fujitsu)
2026-02-12 20:02 ` [sos-linux-dev] " Koralahalli Channabasappa, Smita
2026-02-13 14:04 ` Gregory Price
2026-02-20 20:47 ` Koralahalli Channabasappa, Smita
2026-02-20 9:45 ` Tomasz Wolski
2026-02-20 21:19 ` Koralahalli Channabasappa, Smita
2026-02-22 23:17 ` Tomasz Wolski
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