From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jeff Moyer Subject: Re: [PATCH 0/4] Fix a crash when block device is read and block size is changed at the same time Date: Tue, 18 Sep 2012 13:22:40 -0400 Message-ID: References: <20120628111541.GB17515@quack.suse.cz> <1343508252.2626.13184.camel@edumazet-glaptop> <1343556630.2626.13257.camel@edumazet-glaptop> <1343586962.2626.13266.camel@edumazet-glaptop> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Eric Dumazet , Jens Axboe , Andrea Arcangeli , Jan Kara , dm-devel@redhat.com, linux-kernel@vger.kernel.org, Alexander Viro , kosaki.motohiro@jp.fujitsu.com, linux-fsdevel@vger.kernel.org, lwoodman@redhat.com, "Alasdair G. Kergon" To: Mikulas Patocka Return-path: In-Reply-To: (Mikulas Patocka's message of "Tue, 18 Sep 2012 13:04:58 -0400 (EDT)") Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-fsdevel.vger.kernel.org Mikulas Patocka writes: > Hi Jeff > > Thanks for testing. > > It would be interesting ... what happens if you take the patch 3, leave > "struct percpu_rw_semaphore bd_block_size_semaphore" in "struct > block_device", but remove any use of the semaphore from fs/block_dev.c? - > will the performance be like unpatched kernel or like patch 3? It could be > that the change in the alignment affects performance on your CPU too, just > differently than on my CPU. I'll give it a try and report back. > What is the CPU model that you used for testing? http://ark.intel.com/products/53570/Intel-Xeon-Processor-E7-2860-%2824M-Cache-2_26-GHz-6_40-GTs-Intel-QPI%29 Cheers, Jeff