From: "Jiawen Wu" <jiawenwu@trustnetic.com>
To: "'Andy Shevchenko'" <andy.shevchenko@gmail.com>
Cc: "'Andrew Lunn'" <andrew@lunn.ch>,
	"'Michael Walle'" <michael@walle.cc>,
	"'Shreeya Patel'" <shreeya.patel@collabora.com>,
	<netdev@vger.kernel.org>, <jarkko.nikula@linux.intel.com>,
	<mika.westerberg@linux.intel.com>, <jsd@semihalf.com>,
	<Jose.Abreu@synopsys.com>, <hkallweit1@gmail.com>,
	<linux@armlinux.org.uk>, <linux-i2c@vger.kernel.org>,
	<linux-gpio@vger.kernel.org>, <mengyuanlou@net-swift.com>
Subject: RE: [PATCH net-next v8 6/9] net: txgbe: Support GPIO to SFP socket
Date: Tue, 23 May 2023 10:08:12 +0800	[thread overview]
Message-ID: <007701d98d1b$6d9decc0$48d9c640$@trustnetic.com> (raw)
In-Reply-To: <ZGvgcdXPBy53y4mn@smile.fi.intel.com>
On Tuesday, May 23, 2023 5:37 AM, Andy Shevchenko wrote:
> On Mon, May 22, 2023 at 06:58:19PM +0800, Jiawen Wu wrote:
> > On Monday, May 22, 2023 5:01 PM, Jiawen Wu wrote:
> > > On Friday, May 19, 2023 9:13 PM, Andrew Lunn wrote:
> > > > > I have one MSI-X interrupt for all general MAC interrupt (see TXGBE_PX_MISC_IEN_MASK).
> > > > > It has 32 bits to indicate various interrupts, GPIOs are the one of them. When GPIO
> > > > > interrupt is determined, GPIO_INT_STATUS register should be read to determine
> > > > > which GPIO line has changed state.
> > > >
> > > > So you have another interrupt controller above the GPIO interrupt
> > > > controller. regmap-gpio is pushing you towards describing this
> > > > interrupt controller as a Linux interrupt controller.
> > > >
> > > > When you look at drivers handling interrupts, most leaf interrupt
> > > > controllers are not described as Linux interrupt controllers. The
> > > > driver interrupt handler reads the interrupt status register and
> > > > internally dispatches to the needed handler. This works well when
> > > > everything is internal to one driver.
> > > >
> > > > However, here, you have two drivers involved, your MAC driver and a
> > > > GPIO driver instantiated by the MAC driver. So i think you are going
> > > > to need to described the MAC interrupt controller as a Linux interrupt
> > > > controller.
> > > >
> > > > Take a look at the mv88e6xxx driver, which does this. It has two
> > > > interrupt controller embedded within it, and they are chained.
> > >
> > > Now I add two interrupt controllers, the first one for the MAC interrupt,
> > > and the second one for regmap-gpio. In the second adding flow,
> > >
> > > 	irq = irq_find_mapping(txgbe->misc.domain, TXGBE_PX_MISC_GPIO_OFFSET);
> > > 	err = regmap_add_irq_chip_fwnode(fwnode, regmap, irq, 0, 0,
> > > 					 chip, &chip_data);
> > >
> > > and then,
> > >
> > > 	config.irq_domain = regmap_irq_get_domain(chip_data);
> > > 	gpio_regmap = gpio_regmap_register(&config);
> > >
> > > "txgbe->misc.domain" is the MAC interrupt domain. I think this flow should
> > > be correct, but still failed to get gpio_irq from gpio_desc with err -517.
> > >
> > > And I still have doubts about what I said earlier:
> > > https://lore.kernel.org/netdev/20230515063200.301026-1-
> > > jiawenwu@trustnetic.com/T/#me1be68e1a1e44426ecc0dd8edf0f6b224e50630d
> > >
> > > There really is nothing wrong with gpiochip_to_irq()??
> >
> > There is indeed something wrong in gpiochip_to_irq(), since commit 5467801 ("gpio:
> > Restrict usage of GPIO chip irq members before initialization"):
> > https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit?id=5467801f1fcbdc46bc7298a84dbf3ca1ff2a7320
> >
> > When I use gpio_regmap_register() to add gpiochip, gpiochip_add_irqchip() will just
> > return 0 since irqchip = NULL, then gc->irq.initialized = false.
> 
> As far as I understood your hardware, you need to provide an IRQ chip for your
> GPIOs. The driver that provides an IRQ chip for GPIO and uses GPIO regmap is
> drivers/gpio/gpio-sl28cpld.c.
> 
> So, you need to create a proper IRQ domain tree before calling for GPIO
> registration.
I've already created it. There is the full code snippet:
+static int txgbe_gpio_init(struct txgbe *txgbe)
+{
+       struct regmap_irq_chip_data *chip_data;
+       struct gpio_regmap_config config = {};
+       struct gpio_regmap *gpio_regmap;
+       struct fwnode_handle *fwnode;
+       struct regmap_irq_chip *chip;
+       struct regmap *regmap;
+       struct pci_dev *pdev;
+       struct device *dev;
+       unsigned int irq;
+       struct wx *wx;
+       int err;
+
+       wx = txgbe->wx;
+       pdev = wx->pdev;
+       dev = &pdev->dev;
+       fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_GPIO]);
+
+       regmap = devm_regmap_init(dev, NULL, wx, &gpio_regmap_config);
+       if (IS_ERR(regmap)) {
+               wx_err(wx, "failed to init GPIO regmap\n");
+               return PTR_ERR(regmap);
+       }
+
+       chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
+       if (!chip)
+               return -ENOMEM;
+
+       chip->name = "txgbe-gpio-irq";
+       chip->irq_drv_data = wx;
+       chip->num_regs = 1;
+       chip->irqs = txgbe_gpio_irqs;
+       chip->num_irqs = ARRAY_SIZE(txgbe_gpio_irqs);
+       chip->status_base = WX_GPIO_INTSTATUS;
+       chip->ack_base = WX_GPIO_EOI;
+       chip->mask_base = WX_GPIO_INTMASK;
+       chip->get_irq_reg = txgbe_get_irq_reg;
+       chip->handle_post_irq = txgbe_handle_post_irq;
+
+       irq = irq_find_mapping(txgbe->misc.domain, TXGBE_PX_MISC_GPIO_OFFSET);
+       err = regmap_add_irq_chip_fwnode(fwnode, regmap, irq, 0, 0,
+                                        chip, &chip_data);
+       if (err) {
+               wx_err(wx, "GPIO IRQ register failed\n");
+               return err;
+       }
+
+       txgbe->gpio_irq = irq;
+       txgbe->gpio_data = chip_data;
+
+       config.label = devm_kasprintf(dev, GFP_KERNEL, "txgbe_gpio-%x",
+                                     (pdev->bus->number << 8) | pdev->devfn);
+       config.parent = dev;
+       config.regmap = regmap;
+       config.fwnode = fwnode;
+       config.drvdata = txgbe;
+       config.ngpio = 6;
+       config.reg_mask_xlate = txgbe_reg_mask_xlate;
+       config.reg_dat_base = WX_GPIO_EXT;
+       config.reg_set_base = WX_GPIO_DR;
+       config.reg_dir_out_base = WX_GPIO_DDR;
+       config.irq_domain = regmap_irq_get_domain(chip_data);
+
+       gpio_regmap = gpio_regmap_register(&config);
+       if (IS_ERR(gpio_regmap)) {
+               wx_err(wx, "GPIO regmap register failed\n");
+               regmap_del_irq_chip(irq, chip_data);
+               return PTR_ERR(gpio_regmap);
+       }
+
+       txgbe->gpio_regmap = gpio_regmap;
+
+       return 0;
+}
> 
> >  Cc the committer: Shreeya Patel.
> 
> You meant "author", right?
Yes, author.
I think "gpiochip_add_data" does not take gpio-regmap case into account.
next prev parent reply	other threads:[~2023-05-23  2:09 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-15  6:31 [PATCH net-next v8 0/9] TXGBE PHYLINK support Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 1/9] net: txgbe: Add software nodes to support phylink Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 2/9] i2c: designware: Add driver support for Wangxun 10Gb NIC Jiawen Wu
2023-05-15  9:24   ` andy.shevchenko
2023-05-17  8:49     ` Jarkko Nikula
2023-05-17  9:25       ` Jiawen Wu
2023-05-17  9:44         ` Andy Shevchenko
2023-05-19 13:26           ` Jarkko Nikula
2023-05-17  9:40       ` Andy Shevchenko
2023-05-15  6:31 ` [PATCH net-next v8 3/9] net: txgbe: Register fixed rate clock Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 4/9] net: txgbe: Register I2C platform device Jiawen Wu
2023-05-15  9:29   ` andy.shevchenko
2023-05-15  6:31 ` [PATCH net-next v8 5/9] net: txgbe: Add SFP module identify Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 6/9] net: txgbe: Support GPIO to SFP socket Jiawen Wu
2023-05-15  9:42   ` andy.shevchenko
2023-05-16  2:38     ` Jiawen Wu
2023-05-16  7:12       ` Andy Shevchenko
2023-05-16  9:39         ` Paolo Abeni
2023-05-16 10:31           ` Russell King (Oracle)
2023-05-17  2:55         ` Jiawen Wu
2023-05-17 10:26           ` Andy Shevchenko
2023-05-17 15:00           ` Andrew Lunn
2023-05-18 11:49             ` Jiawen Wu
2023-05-18 12:27               ` Andy Shevchenko
2023-05-18 16:02                 ` Michael Walle
2023-05-18 16:07                   ` Andy Shevchenko
2023-05-23  9:55                 ` Jiawen Wu
2023-05-23 11:07                   ` Andy Shevchenko
2023-05-23 11:10                     ` Andy Shevchenko
2023-05-18 12:48               ` Andrew Lunn
2023-05-19  2:25                 ` Jiawen Wu
2023-05-19 13:13                   ` Andrew Lunn
2023-05-22  9:00                     ` Jiawen Wu
2023-05-22  9:06                       ` Jiawen Wu
2023-05-22 10:58                       ` Jiawen Wu
2023-05-22 21:36                         ` 'Andy Shevchenko'
2023-05-23  2:08                           ` Jiawen Wu [this message]
2023-05-23  6:12                       ` Jiawen Wu
2023-05-19  8:24                 ` Jiawen Wu
2023-05-19 13:24                   ` Andrew Lunn
2023-05-15 21:36   ` Andy Shevchenko
2023-05-16  2:05     ` Jiawen Wu
2023-05-17 10:29       ` 'Andy Shevchenko'
2023-05-15  6:31 ` [PATCH net-next v8 7/9] net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS Jiawen Wu
2023-05-15  6:31 ` [PATCH net-next v8 8/9] net: txgbe: Implement phylink pcs Jiawen Wu
2023-05-16  2:45   ` Lars-Peter Clausen
2023-05-15  6:32 ` [PATCH net-next v8 9/9] net: txgbe: Support phylink MAC layer Jiawen Wu
2023-05-16  9:43   ` Paolo Abeni
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