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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b9d6e7c8492sm383732966b.47.2026.04.14.01.37.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Apr 2026 01:37:44 -0700 (PDT) Message-ID: <0975d136-0013-425b-a465-08f07efcefc7@oss.qualcomm.com> Date: Tue, 14 Apr 2026 10:37:42 +0200 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM To: Ajay Kumar Nandam , Bjorn Andersson , Linus Walleij Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@oss.qualcomm.com References: <20260413122233.375945-1-ajay.nandam@oss.qualcomm.com> <20260413122233.375945-2-ajay.nandam@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260413122233.375945-2-ajay.nandam@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=C9vZDwP+ c=1 sm=1 tr=0 ts=69ddfcdb cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=geYgjXO_D7EpWZfwOI0A:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE0MDA3OSBTYWx0ZWRfX/KEA1JXJTb+o IQ9WX9MBYpbqpPfI6Epa1OyxjpU0bSRY8I1/GTA0tpxA7x5b1wjlWUI15C5nBiDuhzyxZWOnuGo 1gC1skqZXf3mCeAdJZdL8Ql8VtvRcuz9/9TvYo44D9xY+rpUr8qRhS1OUxvRHAuYrFVpv4MCMX1 ZX76fHUvQZN05FwyKO2n+xaLAA/mDurtIDu6fzhyaD1SSjL5a/o/mk7tqwqt8ggi7AsoakutlYI FeQqkDnNwbs0LAfiUPFzION+45/syWmapoJZzmfpAeUvgbBJ6T9VmKm53+8qMXNoqhLQZVGjsUc lrwz32QLT6hH6mqWUOUW1B+3+uuD/AytjAiQ5E1G/A/W9q3eIkTOUqD/lhrAk97EbxCLCnKJVHa MkGek7gEFq5oSJMedsmisS9SkJGpLYwTLm01G/DUXL26mfIMeCB1up/Y9L3/eVG8E5+JuKL7oiS LFgqrxHJbzCbKtm6bAA== X-Proofpoint-GUID: GiTLbTmoyw93KGp15aloL39uX8jDxD6Y X-Proofpoint-ORIG-GUID: GiTLbTmoyw93KGp15aloL39uX8jDxD6Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-14_02,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140079 On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote: > Convert the LPASS LPI pinctrl driver to use the PM clock framework for > runtime power management. > > This allows the LPASS LPI pinctrl driver to drop clock votes when idle, > improves power efficiency on platforms using LPASS LPI island mode, and > aligns the driver with common runtime PM patterns used across Qualcomm > LPASS subsystems. > > Signed-off-by: Ajay Kumar Nandam > --- > drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 36 +++++++++++++------ > drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 2 ++ > .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 5 +++ > 3 files changed, 32 insertions(+), 11 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > index 76aed3296..6d50e06ef 100644 > --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c > @@ -14,15 +14,16 @@ > > #include > #include > +#include > #include > > #include "../pinctrl-utils.h" > > #include "pinctrl-lpass-lpi.h" > +#include Please move it up, together with other non-local includes [...] > + pm_runtime_set_autosuspend_delay(dev, 100); > + pm_runtime_use_autosuspend(dev); > + pm_runtime_enable(dev); devm_pm_runtime_enable() will let you drop the manual disablement below and in .remove() > > pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops; > pctrl->desc.pmxops = &lpi_gpio_pinmux_ops; > @@ -539,20 +540,33 @@ int lpi_pinctrl_probe(struct platform_device *pdev) > return 0; > > err_pinctrl: > + pm_runtime_disable(dev); > mutex_destroy(&pctrl->lock); > - clk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks); > > return ret; > } [...] > --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c > @@ -139,10 +139,15 @@ static const struct of_device_id lpi_pinctrl_of_match[] = { > }; > MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); > > +static const struct dev_pm_ops lpi_pinctrl_pm_ops = { > + RUNTIME_PM_OPS(lpi_pinctrl_runtime_suspend, lpi_pinctrl_runtime_resume, NULL) > +}; > + > static struct platform_driver lpi_pinctrl_driver = { > .driver = { > .name = "qcom-sc7280-lpass-lpi-pinctrl", > .of_match_table = lpi_pinctrl_of_match, > + .pm = pm_ptr(&lpi_pinctrl_pm_ops), I believe SoCs other than kodiak also require this change to avoid regressions. Konrad