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[2001:1c00:c0c:fe00:6c10:fbf3:14c4:884c]) by smtp.gmail.com with ESMTPSA id j5sm5280780eja.47.2020.11.10.00.35.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Nov 2020 00:35:41 -0800 (PST) Subject: Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting To: Coiby Xu Cc: Linus Walleij , Andy Shevchenko , linux-gpio@vger.kernel.org, Benjamin Tissoires , stable@vger.kernel.org, open list References: <20201105231912.69527-1-coiby.xu@gmail.com> <20201105231912.69527-5-coiby.xu@gmail.com> <20201110082633.2rtmegilva2hgst4@Rk> From: Hans de Goede Message-ID: <0aed4370-ed79-7f23-56c2-27b9df4af46e@redhat.com> Date: Tue, 10 Nov 2020 09:35:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201110082633.2rtmegilva2hgst4@Rk> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi, On 11/10/20 9:26 AM, Coiby Xu wrote: > On Mon, Nov 09, 2020 at 02:52:17PM +0100, Hans de Goede wrote: >> Hi, >> >> On 11/6/20 12:19 AM, Coiby Xu wrote: >>> Debounce filter setting should be independent from IRQ type setting >>> because according to the ACPI specs, there are separate arguments for >>> specifying debounce timeout and IRQ type in GpioIo() and GpioInt(). >>> >>> This will fix broken touchpads for laptops whose BIOS set the debounce >>> timeout to a relatively large value. For example, the BIOS of Lenovo >>> Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set >>> the debounce timeout to 124.8ms. This led to the kernel receiving only >>> ~7 HID reports per second from the Synaptics touchpad >>> (MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled >>> by this bug because the debounce timeout has been set to 0 by the BIOS >>> before enabling the debounce filter in setting IRQ type. >>> >>> [1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582 >>> [2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28 >>> >>> Cc: Hans de Goede >>> Cc: Andy Shevchenko >>> Cc: Benjamin Tissoires >>> Cc: stable@vger.kernel.org >>> Reviewed-by: Andy Shevchenko >>> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190 >>> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/ >>> Signed-off-by: Coiby Xu >> >> I'm not entirely sure about this patch. This is consistent with how we >> already stopped touching the debounce timeout setting during init, so >> that speaks in favor of this change. >> >> Still I'm worried a bit that this might have undesirable side effects. >> > Now I can only confirm this patch won't affect the mentioned touchpads. > I'll see if other distributions like Manjaro are willing to test it > through the unstable channel. > >> I guess this should be landed together with Andy's series to apply >> the debounce setting from the ACPI GPIO resources. > > Thank you for the reminding! You are right, Andy's patch > "gpiolib: acpi: Take into account debounce settings" is needed to > fix this kind of touchpad issues. Since that patch hasn't been > merged, is there a way to refer to it in the commit message? You can always refer to it by subject, as you did above. Regards, Hans >>> --- >>>  drivers/pinctrl/pinctrl-amd.c | 7 ------- >>>  1 file changed, 7 deletions(-) >>> >>> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c >>> index e9b761c2b77a..2d4acf21117c 100644 >>> --- a/drivers/pinctrl/pinctrl-amd.c >>> +++ b/drivers/pinctrl/pinctrl-amd.c >>> @@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) >>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF); >>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); >>>          pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF; >>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF; >>>          irq_set_handler_locked(d, handle_edge_irq); >>>          break; >>> >>> @@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) >>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF); >>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); >>>          pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF; >>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF; >>>          irq_set_handler_locked(d, handle_edge_irq); >>>          break; >>> >>> @@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) >>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF); >>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); >>>          pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF; >>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF; >>>          irq_set_handler_locked(d, handle_edge_irq); >>>          break; >>> >>> @@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) >>>          pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF; >>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); >>>          pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF; >>> -        pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF); >>> -        pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF; >>>          irq_set_handler_locked(d, handle_level_irq); >>>          break; >>> >>> @@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) >>>          pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF; >>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); >>>          pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF; >>> -        pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF); >>> -        pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF; >>>          irq_set_handler_locked(d, handle_level_irq); >>>          break; >>> >>> >> > > -- > Best regards, > Coiby >