From: Timur Tabi <timur@codeaurora.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
thierry.reding@gmail.com, david.brown@linaro.org,
andy.gross@linaro.org,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Archit Taneja <architt@codeaurora.org>
Subject: Re: [PATCH 3/3] [v6] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002
Date: Mon, 18 Dec 2017 22:47:47 -0600 [thread overview]
Message-ID: <13bbaec1-31d9-f9fe-71b1-5b991f123108@codeaurora.org> (raw)
In-Reply-To: <20171219023935.GA17456@codeaurora.org>
On 12/18/17 8:39 PM, Stephen Boyd wrote:
> Ah I missed that the u16 array can't be iterated through. Any
> chance the ACPI tables can be changed to list pin ranges, like
> <33 3>, <90 2>, to indicate that pins 33, 34, 35 and pins 90, 91
> are available?
It's too late. Firmware is already shipping with the current layout.
Unfortunately, there's no good peer review process for DSDs that don't
have a DT equivalent.
> That would allow us to put that into the core
> pinctrl-msm.c file a little better and then only expose pins on
> the gpiochip when call gpiochip_add_pin_range(). If we want to
> support this in DT, I think we would have a DT property like
> available-gpios = <33 3>, <90 2>, <100 34> that we can then
> iterate through and add only these pins to the gpiochip. That's
> better than a bitmap in DT and is still compressed somewhat.
Keep in mind that all this ACPI junk is localized to pinctrl-qdf2xxx.
pinctrl-msm does not define any new data structures, it just reuses the
existing one. You can still define your DT properties any way you want
in your client drivers. pinctrl-qdf2xxx is specific to the Centriq chips.
> Without going all the way down into that path, here's my patch to
> make your patch smaller, but perhaps we can just look for the
> ACPI property or the DT property in the pinctrl-msm.c core and
> then add pin ranges directly. Then this ACPI driver doesn't
> really need to change besides for the ID update. We can expose
> all the pins and offsets, etc. from the hardware driver but cut
> out gpios in the core layer in a generic way.
Ok, let me review this. I don't think there's any gain in moving the
ACPI processing to pinctrl-msm, however.
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2017-12-19 4:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-13 18:30 [PATCH 0/3] [v10] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-12-13 18:30 ` [PATCH 1/3] [v2] Revert "gpio: set up initial state from .get_direction()" Timur Tabi
2017-12-13 22:37 ` Stephen Boyd
2017-12-13 18:30 ` [PATCH 2/3] [v8] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-12-13 22:37 ` Stephen Boyd
2017-12-13 18:30 ` [PATCH 3/3] [v6] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002 Timur Tabi
2017-12-13 23:01 ` Stephen Boyd
2017-12-13 23:09 ` Timur Tabi
2017-12-19 1:18 ` Timur Tabi
2017-12-19 2:39 ` Stephen Boyd
2017-12-19 4:47 ` Timur Tabi [this message]
2017-12-19 19:10 ` Stephen Boyd
2017-12-19 19:27 ` Timur Tabi
2017-12-19 20:30 ` Stephen Boyd
2017-12-19 20:32 ` Timur Tabi
2017-12-19 22:56 ` Timur Tabi
2017-12-20 2:26 ` Stephen Boyd
2017-12-20 4:05 ` Timur Tabi
2017-12-20 8:15 ` Stephen Boyd
2017-12-20 17:46 ` Timur Tabi
2017-12-21 0:39 ` Stephen Boyd
2017-12-21 1:06 ` Timur Tabi
2017-12-22 1:46 ` Stephen Boyd
2018-01-04 15:46 ` Timur Tabi
2018-01-04 16:04 ` Andy Shevchenko
2018-01-09 13:46 ` Linus Walleij
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