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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Alexandre Courbot <gnurou@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>, Alan Cox <alan@linux.intel.com>,
	Ning Li <ning.li@intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/2] gpio: Increase ARCH_NR_GPIOs to 512
Date: Mon, 15 Sep 2014 17:09:44 +0300	[thread overview]
Message-ID: <1410790185-31101-1-git-send-email-mika.westerberg@linux.intel.com> (raw)

Some newer Intel SoCs, like Braswell already have more than 256 GPIOs
available so the default limit is exceeded. Instead of adding more
architecture specific gpio.h files with custom ARCH_NR_GPIOs we increase
the gpiolib default limit to be twice the current.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
Changes to previous version is that now we increase the common limit
instead of adding x86 specific gpio.h

 include/asm-generic/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index c1d4105e1c1d..383ade1a211b 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -27,7 +27,7 @@
  */
 
 #ifndef ARCH_NR_GPIOS
-#define ARCH_NR_GPIOS		256
+#define ARCH_NR_GPIOS		512
 #endif
 
 /*
-- 
2.1.0


             reply	other threads:[~2014-09-15 14:09 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-15 14:09 Mika Westerberg [this message]
2014-09-15 14:09 ` [PATCH v2 2/2] gpio: Add support for Intel Cherryview/Braswell GPIO controller Mika Westerberg
2014-09-22 11:19   ` Mika Westerberg
2014-09-24  9:10   ` Linus Walleij
2014-09-24  9:12     ` Linus Walleij
2014-09-24  9:29     ` Mika Westerberg
2014-09-15 16:50 ` [PATCH v2 1/2] gpio: Increase ARCH_NR_GPIOs to 512 Arnd Bergmann
2014-09-16  9:34   ` Mika Westerberg
2014-09-23 15:23 ` Linus Walleij

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