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From: Liu Gang <Gang.Liu@freescale.com>
To: robh+dt@kernel.org, linus.walleij@linaro.org, arnd@arndb.de,
	shawnguo@kernel.org
Cc: devicetree@vger.kernel.org, R58472@freescale.com,
	b07421@freescale.com, bhupesh.sharma@freescale.com,
	linux-gpio@vger.kernel.org, Gang.Liu@freescale.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2 V2] ls2080a/dts: Add little endian property for GPIO IP block
Date: Thu, 5 Nov 2015 10:42:21 +0800	[thread overview]
Message-ID: <1446691342-1943-1-git-send-email-Gang.Liu@freescale.com> (raw)

The GPIO block for ls2080a platform has little endian registers,
the GPIO driver needs this property to read/write registers by
right interface.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
V2 changes: No

 Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 3 +++
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi          | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index f2455c5..c836dab 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -10,6 +10,9 @@ Required properties:
   the second cell is used to specify the gpio polarity:
       0 = active high
       1 = active low
+- little-endian : Should be set if the GPIO has little endian
+		  registers. No the property means the GPIO
+		  registers are big endian mode.
 
 Example:
 
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index e81cd48..0099205 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -277,6 +277,7 @@
 			reg = <0x0 0x2300000 0x0 0x10000>;
 			interrupts = <0 36 0x4>; /* Level high type */
 			gpio-controller;
+			little-endian;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -287,6 +288,7 @@
 			reg = <0x0 0x2310000 0x0 0x10000>;
 			interrupts = <0 36 0x4>; /* Level high type */
 			gpio-controller;
+			little-endian;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -297,6 +299,7 @@
 			reg = <0x0 0x2320000 0x0 0x10000>;
 			interrupts = <0 37 0x4>; /* Level high type */
 			gpio-controller;
+			little-endian;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -307,6 +310,7 @@
 			reg = <0x0 0x2330000 0x0 0x10000>;
 			interrupts = <0 37 0x4>; /* Level high type */
 			gpio-controller;
+			little-endian;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-- 
2.1.0.27.g96db324

             reply	other threads:[~2015-11-05  2:42 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05  2:42 Liu Gang [this message]
2015-11-05  2:42 ` [PATCH 2/2 V2] drivers/gpio: Port gpio driver to layerscape platform Liu Gang
2015-11-11  6:42   ` Liu Gang
2015-11-05  2:54 ` [PATCH 1/2 V2] ls2080a/dts: Add little endian property for GPIO IP block Sharma Bhupesh
2015-11-05 21:21 ` Rob Herring

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