* [PATCH 1/5] ARM: bcm2835: Define standard pinctrl groups in the gpio node.
[not found] <1456425661-26123-1-git-send-email-eric@anholt.net>
@ 2016-02-25 18:40 ` Eric Anholt
2016-02-25 22:24 ` Eric Anholt
2016-02-25 18:41 ` [PATCH 4/5] ARM: bcm2835: Add a group for mapping pins 48-53 to sdhost Eric Anholt
2016-02-25 18:41 ` [PATCH 5/5] ARM: bcm2835: Move most RPi default pin groups to their devices Eric Anholt
2 siblings, 1 reply; 5+ messages in thread
From: Eric Anholt @ 2016-02-25 18:40 UTC (permalink / raw)
To: linux-rpi-kernel
Cc: linux-arm-kernel, linux-kernel, Stephen Warren, Lee Jones,
Florian Fainelli, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, devicetree, Linus Walleij, linux-gpio,
Stefan Wahren, Eric Anholt
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm283x.dtsi | 170 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 170 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 8aaf193..e91198e 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -110,6 +110,176 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spio0_gpio35: spio0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial@7e201000 {
--
2.7.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 4/5] ARM: bcm2835: Add a group for mapping pins 48-53 to sdhost.
[not found] <1456425661-26123-1-git-send-email-eric@anholt.net>
2016-02-25 18:40 ` [PATCH 1/5] ARM: bcm2835: Define standard pinctrl groups in the gpio node Eric Anholt
@ 2016-02-25 18:41 ` Eric Anholt
2016-02-25 18:41 ` [PATCH 5/5] ARM: bcm2835: Move most RPi default pin groups to their devices Eric Anholt
2 siblings, 0 replies; 5+ messages in thread
From: Eric Anholt @ 2016-02-25 18:41 UTC (permalink / raw)
To: linux-rpi-kernel
Cc: linux-arm-kernel, linux-kernel, Stephen Warren, Lee Jones,
Florian Fainelli, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, devicetree, Linus Walleij, linux-gpio,
Stefan Wahren, Eric Anholt
This pin group definition comes from downstream. We don't have a
driver for sdhost integrated yet, but they've been experimenting with
it and it sounds useful to bring over.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm283x.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 70a6814..0bb32cc 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -191,6 +191,10 @@
brcm,pins = <45>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
+ sdhost_gpio48: sdhost_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
i2c0_gpio44: i2c0_gpio44 {
brcm,pins = <44 45>;
brcm,function = <BCM2835_FSEL_ALT1>;
--
2.7.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 5/5] ARM: bcm2835: Move most RPi default pin groups to their devices.
[not found] <1456425661-26123-1-git-send-email-eric@anholt.net>
2016-02-25 18:40 ` [PATCH 1/5] ARM: bcm2835: Define standard pinctrl groups in the gpio node Eric Anholt
2016-02-25 18:41 ` [PATCH 4/5] ARM: bcm2835: Add a group for mapping pins 48-53 to sdhost Eric Anholt
@ 2016-02-25 18:41 ` Eric Anholt
2 siblings, 0 replies; 5+ messages in thread
From: Eric Anholt @ 2016-02-25 18:41 UTC (permalink / raw)
To: linux-rpi-kernel
Cc: linux-arm-kernel, linux-kernel, Stephen Warren, Lee Jones,
Florian Fainelli, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, devicetree, Linus Walleij, linux-gpio,
Stefan Wahren, Eric Anholt
This way we can get the duplicated pin group definitions out of each
RPi board file, and just leave the i2s variations in them.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 14 +++-----------
arch/arm/boot/dts/bcm2835-rpi-a.dts | 14 +++-----------
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 14 +++-----------
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 14 +++-----------
arch/arm/boot/dts/bcm2835-rpi-b.dts | 12 ------------
arch/arm/boot/dts/bcm2835-rpi.dtsi | 20 ++++++++++++++++++++
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 14 +++-----------
7 files changed, 35 insertions(+), 67 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index 1db6835..a00cbbe 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -20,15 +20,7 @@
};
};
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pcm_gpio18
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcm_gpio18>;
};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index 25d2114..23e6b6f 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -13,15 +13,7 @@
};
};
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pcm_gpio28
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcm_gpio28>;
};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index d8057b8..029b589 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -20,15 +20,7 @@
};
};
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pcm_gpio18
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcm_gpio18>;
};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index e7dbff4..da1bc27 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -13,15 +13,7 @@
};
};
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pcm_gpio28
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcm_gpio28>;
};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index d154049..df275d4 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -12,15 +12,3 @@
};
};
};
-
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
-};
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index eff27b0..b8efd41 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -31,6 +31,9 @@
&gpio {
pinctrl-names = "default";
+ pinctrl-0 = <&gpclk0_gpio4
+ &gpclk1_gpio5
+ &gpioout>;
gpioout: gpioout {
brcm,pins = <6>;
@@ -39,11 +42,17 @@
};
&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_gpio0>;
+
status = "okay";
clock-frequency = <100000>;
};
&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_gpio2>;
+
status = "okay";
clock-frequency = <100000>;
};
@@ -53,14 +62,25 @@
};
&sdhci {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_gpio48>;
+
status = "okay";
bus-width = <4>;
};
&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+
status = "okay";
};
&usb {
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
+
+&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_gpio7>;
+};
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index 3e9226f..ae2bc91 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -24,15 +24,7 @@
};
};
-&gpio {
- pinctrl-0 = <&i2c0_gpio0
- &i2c1_gpio2
- &gpclk0_gpio4
- &gpclk1_gpio5
- &spi0_gpio7
- &pcm_gpio18
- &pwm0_gpio40
- &pwm1_gpio45
- &emmc_gpio48
- &gpioout>;
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcm_gpio18>;
};
--
2.7.0
^ permalink raw reply related [flat|nested] 5+ messages in thread