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From: "Álvaro Fernández Rojas" <noltari@gmail.com>
To: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: linus.walleij@linaro.org, gnurou@gmail.com,
	chunkeey@googlemail.com,
	"Álvaro Fernández Rojas" <noltari@gmail.com>
Subject: [PATCH v2 1/2] gpio: dt-bindings: add brcm,bcm6345-gpio bindings
Date: Wed,  3 Aug 2016 14:05:56 +0200	[thread overview]
Message-ID: <1470225957-5692-1-git-send-email-noltari@gmail.com> (raw)

This patch adds the device tree bindings for the Broadcom's BCM6345
memory-mapped GPIO controllers.

The gpios will be supported by gpio-mmio code of the
GPIO generic library.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: add improvements suggested by Jonas Gorski:
  - use native-endian instead of big-endian.
  - use gpio alias instead of gpio0.
  - be less dramatic with newer Broadcom SoCs.
  - reorder patches.

 .../devicetree/bindings/gpio/brcm,bcm6345-gpio.txt | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt

diff --git a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
new file mode 100644
index 0000000..e785314
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
@@ -0,0 +1,46 @@
+Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers.
+
+These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
+are the only ones which don't need a pinctrl driver.
+BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
+and/or written, and the direction changed from input to output.
+BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
+and/or written, and the direction changed from input to output.
+
+Required properties:
+	- compatible: should be "brcm,bcm6345-gpio"
+	- reg-names: must contain
+		"dat" - data register
+		"dirout" - direction (output) register
+	- reg: address + size pairs describing the GPIO register sets;
+		order must correspond with the order of entries in reg-names
+	- #gpio-cells: must be set to 2. The first cell is the pin number and
+			the second cell is used to specify the gpio polarity:
+			0 = active high
+			1 = active low
+	- gpio-controller: Marks the device node as a gpio controller.
+
+Optional properties:
+	- native-endian: use native endian memory.
+
+Examples:
+	- BCM6338:
+	gpio: gpio-controller@fffe0407 {
+		compatible = "brcm,bcm6345-gpio";
+		reg-names = "dirout", "dat";
+		reg = <0xfffe0407 1>, <0xfffe040f 1>;
+
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	- BCM6345:
+	gpio: gpio-controller@fffe0406 {
+		compatible = "brcm,bcm6345-gpio";
+		reg-names = "dirout", "dat";
+		reg = <0xfffe0406 2>, <0xfffe040a 2>;
+		native-endian;
+
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
-- 
2.1.4


             reply	other threads:[~2016-08-03 12:06 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-03 12:05 Álvaro Fernández Rojas [this message]
     [not found] ` <1470225957-5692-1-git-send-email-noltari-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-11 11:45   ` [PATCH v2 1/2] gpio: dt-bindings: add brcm,bcm6345-gpio bindings Linus Walleij
     [not found]     ` <CACRpkdYfApcW6M1DV4tKiBuX18eAbjWAJB-1K_-dUYx=T1xT4A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-11 13:54       ` Álvaro Fernández Rojas
2016-08-11 14:16 ` Linus Walleij

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