From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Linus Walleij <linus.walleij@linaro.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
Takeshi Kihara <takeshi.kihara.df@renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 4/5] pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin
Date: Wed, 12 Jul 2017 12:31:16 +0200 [thread overview]
Message-ID: <1499855477-20818-5-git-send-email-geert+renesas@glider.be> (raw)
In-Reply-To: <1499855477-20818-1-git-send-email-geert+renesas@glider.be>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch fixes the IPSR register setting when the MSIOF3_SS1_E pin
function is selected.
This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 6fa1729d784e6df2..0fd96f198b4dfae2 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -645,7 +645,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP0_31_28, VI4_DATA1_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP0_31_28, CAN0_RX_B, SEL_RCAN0_1),
PINMUX_IPSR_MSEL(IP0_31_28, CANFD0_RX_B, SEL_CANFD0_1),
- PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS1_E, SEL_MSIOF3_4),
+ PINMUX_IPSR_MSEL(IP0_31_28, MSIOF3_SS1_E, SEL_MSIOF3_4),
/* IPSR1 */
PINMUX_IPSR_GPSR(IP1_3_0, IRQ2),
--
2.7.4
next prev parent reply other threads:[~2017-07-12 10:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-12 10:31 [PATCH 0/5] pinctrl: sh-pfc: r8a7795/r8a7796: MSIOF updates Geert Uytterhoeven
2017-07-12 10:31 ` [PATCH 1/5] pinctrl: sh-pfc: r8a7795: Fix MSIOF3_{SS1,SS2}_E pin function definitions Geert Uytterhoeven
2017-07-12 10:31 ` [PATCH 2/5] pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups and functions Geert Uytterhoeven
2017-07-12 10:31 ` [PATCH 3/5] pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pin function definitions Geert Uytterhoeven
2017-07-12 10:31 ` Geert Uytterhoeven [this message]
2017-07-12 10:31 ` [PATCH 5/5] pinctrl: sh-pfc: r8a7796: Fix MSIOF3 SS2_E mux Geert Uytterhoeven
2017-08-01 8:40 ` [PATCH 0/5] pinctrl: sh-pfc: r8a7795/r8a7796: MSIOF updates Linus Walleij
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