* [PATCH 0/8] Add CAN support to iwg2[02]d @ 2017-11-07 15:10 Fabrizio Castro 2017-11-07 15:10 ` [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support Fabrizio Castro 2017-11-20 10:07 ` [PATCH 0/8] Add CAN support to iwg2[02]d Simon Horman 0 siblings, 2 replies; 9+ messages in thread From: Fabrizio Castro @ 2017-11-07 15:10 UTC (permalink / raw) To: Wolfgang Grandegger, Marc Kleine-Budde, Rob Herring, Mark Rutland, Russell King, Laurent Pinchart, Geert Uytterhoeven, Linus Walleij Cc: Fabrizio Castro, Simon Horman, Magnus Damm, linux-can, netdev, devicetree, linux-arm-kernel, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das Hello, this series delivers all of the changes necessary to add CAN bus support to the: * iW-RainboW-G22D SODIMM, and * iW-RainboW-G20M-Qseven-RZG1M development platforms, including documentation, pinctrl driver, SoC specific device trees, and board specific device trees. This work has been based and tested on top of: renesas-devel-20171106-v4.14-rc8 Best regards, Fabrizio Castro (8): dt-bindings: can: rcar_can: document r8a774[35] can support pinctrl: sh-pfc: r8a7745: Add CAN[01] support ARM: dts: r8a7745: Add CAN[01] SoC support ARM: dts: iwg22d-sodimm: Add can0 support to carrier board ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB ARM: dts: r8a7743: Add CAN[01] SoC support ARM: dts: iwg20d-q7-common: Add can0 support to carrier board ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB .../devicetree/bindings/net/can/rcar_can.txt | 7 +- arch/arm/boot/dts/iwg20d-q7-common.dtsi | 12 ++ arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 12 ++ arch/arm/boot/dts/r8a7743.dtsi | 36 +++++ .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++ arch/arm/boot/dts/r8a7745.dtsi | 36 +++++ drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 146 +++++++++++++++++++++ 8 files changed, 271 insertions(+), 2 deletions(-) -- 2.7.4 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support 2017-11-07 15:10 [PATCH 0/8] Add CAN support to iwg2[02]d Fabrizio Castro @ 2017-11-07 15:10 ` Fabrizio Castro 2017-11-10 10:00 ` Geert Uytterhoeven 2017-11-20 10:07 ` [PATCH 0/8] Add CAN support to iwg2[02]d Simon Horman 1 sibling, 1 reply; 9+ messages in thread From: Fabrizio Castro @ 2017-11-07 15:10 UTC (permalink / raw) To: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij Cc: Fabrizio Castro, Simon Horman, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das This patch adds PFC CAN0 and CAN1 pin groups and functions, enabling CAN bus on the RZ/G1E. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> --- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 146 +++++++++++++++++++++++++++++++++++ 1 file changed, 146 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c index 333a3470..e5b3d5f 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c @@ -1608,6 +1608,116 @@ static const unsigned int avb_gmii_mux[] = { AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, AVB_COL_MARK, }; + +/* - CAN -------------------------------------------------------------------- */ +static const unsigned int can0_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 14), +}; + +static const unsigned int can0_data_mux[] = { + CAN0_TX_MARK, CAN0_RX_MARK, +}; + +static const unsigned int can0_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 15), +}; + +static const unsigned int can0_data_b_mux[] = { + CAN0_TX_B_MARK, CAN0_RX_B_MARK, +}; + +static const unsigned int can0_data_c_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16), +}; + +static const unsigned int can0_data_c_mux[] = { + CAN0_TX_C_MARK, CAN0_RX_C_MARK, +}; + +static const unsigned int can0_data_d_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11), +}; + +static const unsigned int can0_data_d_mux[] = { + CAN0_TX_D_MARK, CAN0_RX_D_MARK, +}; + +static const unsigned int can1_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 24), +}; + +static const unsigned int can1_data_mux[] = { + CAN1_TX_MARK, CAN1_RX_MARK, +}; + +static const unsigned int can1_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1), +}; + +static const unsigned int can1_data_b_mux[] = { + CAN1_TX_B_MARK, CAN1_RX_B_MARK, +}; + +static const unsigned int can1_data_c_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5), +}; + +static const unsigned int can1_data_c_mux[] = { + CAN1_TX_C_MARK, CAN1_RX_C_MARK, +}; + +static const unsigned int can1_data_d_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30), +}; + +static const unsigned int can1_data_d_mux[] = { + CAN1_TX_D_MARK, CAN1_RX_D_MARK, +}; + +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(3, 31), +}; + +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + +static const unsigned int can_clk_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 23), +}; + +static const unsigned int can_clk_b_mux[] = { + CAN_CLK_B_MARK, +}; + +static const unsigned int can_clk_c_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 0), +}; + +static const unsigned int can_clk_c_mux[] = { + CAN_CLK_C_MARK, +}; + +static const unsigned int can_clk_d_pins[] = { + /* CLK */ + RCAR_GP_PIN(5, 0), +}; + +static const unsigned int can_clk_d_mux[] = { + CAN_CLK_D_MARK, +}; + /* - DU --------------------------------------------------------------------- */ static const unsigned int du0_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -3459,6 +3569,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), + SH_PFC_PIN_GROUP(can0_data), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can0_data_c), + SH_PFC_PIN_GROUP(can0_data_d), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can1_data_b), + SH_PFC_PIN_GROUP(can1_data_c), + SH_PFC_PIN_GROUP(can1_data_d), + SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(can_clk_b), + SH_PFC_PIN_GROUP(can_clk_c), + SH_PFC_PIN_GROUP(can_clk_d), SH_PFC_PIN_GROUP(du0_rgb666), SH_PFC_PIN_GROUP(du0_rgb888), SH_PFC_PIN_GROUP(du0_clk0_out), @@ -3731,6 +3853,28 @@ static const char * const avb_groups[] = { "avb_gmii", }; +static const char * const can0_groups[] = { + "can0_data", + "can0_data_b", + "can0_data_c", + "can0_data_d", + "can_clk", + "can_clk_b", + "can_clk_c", + "can_clk_d", +}; + +static const char * const can1_groups[] = { + "can1_data", + "can1_data_b", + "can1_data_c", + "can1_data_d", + "can_clk", + "can_clk_b", + "can_clk_c", + "can_clk_d", +}; + static const char * const du0_groups[] = { "du0_rgb666", "du0_rgb888", @@ -4102,6 +4246,8 @@ static const char * const vin1_groups[] = { static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), SH_PFC_FUNCTION(eth), -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support 2017-11-07 15:10 ` [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support Fabrizio Castro @ 2017-11-10 10:00 ` Geert Uytterhoeven 2017-11-10 17:16 ` [RFC PATCH 0/2] Add can_clk function Fabrizio Castro 0 siblings, 1 reply; 9+ messages in thread From: Geert Uytterhoeven @ 2017-11-10 10:00 UTC (permalink / raw) To: Fabrizio Castro Cc: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij, Simon Horman, Linux-Renesas, linux-gpio@vger.kernel.org, Chris Paterson, Biju Das Hi Fabrizio, On Tue, Nov 7, 2017 at 4:10 PM, Fabrizio Castro <fabrizio.castro@bp.renesas.com> wrote: > This patch adds PFC CAN0 and CAN1 pin groups and functions, enabling CAN > bus on the RZ/G1E. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Biju Das <biju.das@bp.renesas.com> Thanks for your patch! Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in sh-pfc-for-v4.16. > +static const char * const can0_groups[] = { > + "can0_data", > + "can0_data_b", > + "can0_data_c", > + "can0_data_d", > + "can_clk", > + "can_clk_b", > + "can_clk_c", > + "can_clk_d", > +}; > + > +static const char * const can1_groups[] = { > + "can1_data", > + "can1_data_b", > + "can1_data_c", > + "can1_data_d", > + "can_clk", > + "can_clk_b", > + "can_clk_c", > + "can_clk_d", > +}; > @@ -4102,6 +4246,8 @@ static const char * const vin1_groups[] = { > static const struct sh_pfc_function pinmux_functions[] = { > SH_PFC_FUNCTION(audio_clk), > SH_PFC_FUNCTION(avb), > + SH_PFC_FUNCTION(can0), > + SH_PFC_FUNCTION(can1), > SH_PFC_FUNCTION(du0), > SH_PFC_FUNCTION(du1), > SH_PFC_FUNCTION(eth), One minor nit: on R-Car Gen3, there is a separate function for can_clk, which is cleaner, as it reduces duplication, and allows for independent configuration. Consider e.g. the case where you want to use both can0 and can1, which means you have to add "can_clk" to exactly one of the two pin nodes in DT: can0_pins: can0 { groups = "can0_data", "can_clk"; function = "can0"; }; can1_pins: can1 { groups = "can0_data"; function = "can0"; }; However, as can_clk is integrated in both the can0 and can1 groups on RZ/G1M (and R-Car M2-W/N, V2H, and M1A), I'll let this pass through. You may want to consider adding the separate group anyway (later), to provide a simpler upgrade path. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 9+ messages in thread
* [RFC PATCH 0/2] Add can_clk function 2017-11-10 10:00 ` Geert Uytterhoeven @ 2017-11-10 17:16 ` Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 1/2] pinctrl: sh-pfc: r8a7794: " Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: " Fabrizio Castro 0 siblings, 2 replies; 9+ messages in thread From: Fabrizio Castro @ 2017-11-10 17:16 UTC (permalink / raw) To: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij Cc: Simon Horman, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das, Fabrizio Castro, Ramesh Shanmugasundaram Hello Geert, All thank you for your comments on patch: "pinctrl: sh-pfc: r8a7745: Add CAN[01] support" Looking at file drivers/pinctrl/sh-pfc/pfc-r8a7791.c, it looks like it could use the same enhancement. This series applies Geert's recommendation to both pfc-r8a7791.c and pfc-r8a7794.c. Unfortunately I wasn't able to actually test this patch set as I don't have access to HW providing can_clk. Best regards, Fabrizio Castro (2): pinctrl: sh-pfc: r8a7745: Add can_clk function pinctrl: sh-pfc: r8a7743: Add can_clk function drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 10 +++++----- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 8 ++++---- 2 files changed, 9 insertions(+), 9 deletions(-) -- 2.7.4 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [RFC PATCH 1/2] pinctrl: sh-pfc: r8a7794: Add can_clk function 2017-11-10 17:16 ` [RFC PATCH 0/2] Add can_clk function Fabrizio Castro @ 2017-11-10 17:16 ` Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: " Fabrizio Castro 1 sibling, 0 replies; 9+ messages in thread From: Fabrizio Castro @ 2017-11-10 17:16 UTC (permalink / raw) To: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij Cc: Simon Horman, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das, Fabrizio Castro, Ramesh Shanmugasundaram This patch adds can_clk function to r8a7745/r8a7794 which is cleaner, as it reduces duplication, and allows for independent configuration. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> --- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c index e5b3d5f..73796aa 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c @@ -3858,10 +3858,6 @@ static const char * const can0_groups[] = { "can0_data_b", "can0_data_c", "can0_data_d", - "can_clk", - "can_clk_b", - "can_clk_c", - "can_clk_d", }; static const char * const can1_groups[] = { @@ -3869,6 +3865,9 @@ static const char * const can1_groups[] = { "can1_data_b", "can1_data_c", "can1_data_d", +}; + +static const char * const can_clk_groups[] = { "can_clk", "can_clk_b", "can_clk_c", @@ -4248,6 +4247,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), SH_PFC_FUNCTION(eth), -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: Add can_clk function 2017-11-10 17:16 ` [RFC PATCH 0/2] Add can_clk function Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 1/2] pinctrl: sh-pfc: r8a7794: " Fabrizio Castro @ 2017-11-10 17:16 ` Fabrizio Castro 2017-11-13 12:17 ` Geert Uytterhoeven 1 sibling, 1 reply; 9+ messages in thread From: Fabrizio Castro @ 2017-11-10 17:16 UTC (permalink / raw) To: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij Cc: Simon Horman, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das, Fabrizio Castro, Ramesh Shanmugasundaram This patch adds can_clk function to r8a7743/r8a7791 which is cleaner, as it reduces duplication, and allows for independent configuration. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 10bd35f..2dbf2419 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -4826,10 +4826,6 @@ static const char * const can0_groups[] = { "can0_data_d", "can0_data_e", "can0_data_f", - "can_clk", - "can_clk_b", - "can_clk_c", - "can_clk_d", }; static const char * const can1_groups[] = { @@ -4837,6 +4833,9 @@ static const char * const can1_groups[] = { "can1_data_b", "can1_data_c", "can1_data_d", +}; + +static const char * const can_clk_groups[] = { "can_clk", "can_clk_b", "can_clk_c", @@ -5308,7 +5307,7 @@ static const char * const vin2_groups[] = { }; static const struct { - struct sh_pfc_function common[56]; + struct sh_pfc_function common[57]; struct sh_pfc_function r8a779x[2]; } pinmux_functions = { .common = { @@ -5316,6 +5315,7 @@ static const struct { SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: Add can_clk function 2017-11-10 17:16 ` [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: " Fabrizio Castro @ 2017-11-13 12:17 ` Geert Uytterhoeven 2017-11-14 15:40 ` Fabrizio Castro 0 siblings, 1 reply; 9+ messages in thread From: Geert Uytterhoeven @ 2017-11-13 12:17 UTC (permalink / raw) To: Fabrizio Castro Cc: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij, Simon Horman, Linux-Renesas, linux-gpio@vger.kernel.org, Chris Paterson, Biju Das, Ramesh Shanmugasundaram Hi Fabrizio, On Fri, Nov 10, 2017 at 6:16 PM, Fabrizio Castro <fabrizio.castro@bp.renesas.com> wrote: > This patch adds can_clk function to r8a7743/r8a7791 which is cleaner, > as it reduces duplication, and allows for independent configuration. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Thanks for your patch! > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c > @@ -4826,10 +4826,6 @@ static const char * const can0_groups[] = { > "can0_data_d", > "can0_data_e", > "can0_data_f", > - "can_clk", > - "can_clk_b", > - "can_clk_c", > - "can_clk_d", As the pin groups and functions are part of the stable DT ABI, you cannot just remove the can_clk* pins from can0_groups[], as that would break existing users. I would keep them, but add a comment "/* retained for backwards compatibility */". > }; > > static const char * const can1_groups[] = { > @@ -4837,6 +4833,9 @@ static const char * const can1_groups[] = { > "can1_data_b", > "can1_data_c", > "can1_data_d", Likewise. > +}; > + > +static const char * const can_clk_groups[] = { > "can_clk", > "can_clk_b", > "can_clk_c", Adding a new can_clk_groups[] ... > @@ -5308,7 +5307,7 @@ static const char * const vin2_groups[] = { > }; > > static const struct { > - struct sh_pfc_function common[56]; > + struct sh_pfc_function common[57]; > struct sh_pfc_function r8a779x[2]; > } pinmux_functions = { > .common = { > @@ -5316,6 +5315,7 @@ static const struct { > SH_PFC_FUNCTION(avb), > SH_PFC_FUNCTION(can0), > SH_PFC_FUNCTION(can1), > + SH_PFC_FUNCTION(can_clk), and can_clk function is OK, though. > SH_PFC_FUNCTION(du), > SH_PFC_FUNCTION(du0), > SH_PFC_FUNCTION(du1), My comments apply to your r8a7794 patch, too. Except that on r8a7794 we didn't have CAN support in pfc-r8a7794.c before, but I would like to treat all R-Car Gen2 and RZ/G1 SoCs in the same way. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: Add can_clk function 2017-11-13 12:17 ` Geert Uytterhoeven @ 2017-11-14 15:40 ` Fabrizio Castro 0 siblings, 0 replies; 9+ messages in thread From: Fabrizio Castro @ 2017-11-14 15:40 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Laurent Pinchart, Geert Uytterhoeven, Linus Walleij, Simon Horman, Linux-Renesas, linux-gpio@vger.kernel.org, Chris Paterson, Biju Das, Ramesh Shanmugasundaram Hello Geert, thank you for your comments. > > As the pin groups and functions are part of the stable DT ABI, you cannot just > remove the can_clk* pins from can0_groups[], as that would break existing users. > > I would keep them, but add a comment "/* retained for backwards > compatibility */". > > Adding a new can_clk_groups[] ... > > and can_clk function is OK, though. > > My comments apply to your r8a7794 patch, too. Except that on r8a7794 we > didn't have CAN support in pfc-r8a7794.c before, but I would like to treat all > R-Car Gen2 and RZ/G1 SoCs in the same way. I'll send a v2 to fix this. Thanks, Fab > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709. ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/8] Add CAN support to iwg2[02]d 2017-11-07 15:10 [PATCH 0/8] Add CAN support to iwg2[02]d Fabrizio Castro 2017-11-07 15:10 ` [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support Fabrizio Castro @ 2017-11-20 10:07 ` Simon Horman 1 sibling, 0 replies; 9+ messages in thread From: Simon Horman @ 2017-11-20 10:07 UTC (permalink / raw) To: Fabrizio Castro Cc: Wolfgang Grandegger, Marc Kleine-Budde, Rob Herring, Mark Rutland, Russell King, Laurent Pinchart, Geert Uytterhoeven, Linus Walleij, Magnus Damm, linux-can, netdev, devicetree, linux-arm-kernel, linux-renesas-soc, linux-gpio, Chris Paterson, Biju Das On Tue, Nov 07, 2017 at 03:10:41PM +0000, Fabrizio Castro wrote: > Hello, > > this series delivers all of the changes necessary to add CAN bus > support to the: > * iW-RainboW-G22D SODIMM, and > * iW-RainboW-G20M-Qseven-RZG1M > development platforms, including documentation, pinctrl driver, SoC > specific device trees, and board specific device trees. > > This work has been based and tested on top of: > renesas-devel-20171106-v4.14-rc8 > > Best regards, > > Fabrizio Castro (8): > dt-bindings: can: rcar_can: document r8a774[35] can support > pinctrl: sh-pfc: r8a7745: Add CAN[01] support > ARM: dts: r8a7745: Add CAN[01] SoC support > ARM: dts: iwg22d-sodimm: Add can0 support to carrier board > ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB > ARM: dts: r8a7743: Add CAN[01] SoC support > ARM: dts: iwg20d-q7-common: Add can0 support to carrier board > ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB Thanks, I have applied the "ARM: dts" patches for inclusion in v4.16. ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-11-20 10:07 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-11-07 15:10 [PATCH 0/8] Add CAN support to iwg2[02]d Fabrizio Castro 2017-11-07 15:10 ` [PATCH 2/8] pinctrl: sh-pfc: r8a7745: Add CAN[01] support Fabrizio Castro 2017-11-10 10:00 ` Geert Uytterhoeven 2017-11-10 17:16 ` [RFC PATCH 0/2] Add can_clk function Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 1/2] pinctrl: sh-pfc: r8a7794: " Fabrizio Castro 2017-11-10 17:16 ` [RFC PATCH 2/2] pinctrl: sh-pfc: r8a7791: " Fabrizio Castro 2017-11-13 12:17 ` Geert Uytterhoeven 2017-11-14 15:40 ` Fabrizio Castro 2017-11-20 10:07 ` [PATCH 0/8] Add CAN support to iwg2[02]d Simon Horman
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