From: Timur Tabi <timur@codeaurora.org>
To: linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
thierry.reding@gmail.com, Stephen Boyd <sboyd@codeaurora.org>,
david.brown@linaro.org, andy.gross@linaro.org,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Archit Taneja <architt@codeaurora.org>
Cc: timur@codeaurora.org
Subject: [PATCH 2/3] [v8] pinctrl: qcom: disable GPIO groups with no pins
Date: Wed, 13 Dec 2017 12:30:17 -0600 [thread overview]
Message-ID: <1513189818-7384-3-git-send-email-timur@codeaurora.org> (raw)
In-Reply-To: <1513189818-7384-1-git-send-email-timur@codeaurora.org>
pinctrl-msm only accepts an array of GPIOs from 0 to n-1, and it expects
each group to support have only one pin (npins == 1).
We can support "sparse" GPIO maps if we allow for some groups to have zero
pins (npins == 0). These pins are "hidden" from the rest of the driver
and gpiolib.
Access to unavailable GPIOs is blocked via a request callback. If the
requested GPIO is unavailable, -EACCES is returned, which prevents
further access to that GPIO.
Signed-off-by: Timur Tabi <timur@codeaurora.org>
---
drivers/pinctrl/qcom/pinctrl-msm.c | 28 +++++++++++++++++++++++-----
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 7a960590ecaa..d45b4c2b5af1 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -507,6 +507,11 @@ static void msm_gpio_dbg_show_one(struct seq_file *s,
};
g = &pctrl->soc->groups[offset];
+
+ /* If the GPIO group has no pins, then don't show it. */
+ if (!g->npins)
+ return;
+
ctl_reg = readl(pctrl->regs + g->ctl_reg);
is_out = !!(ctl_reg & BIT(g->oe_bit));
@@ -516,7 +521,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s,
seq_printf(s, " %-8s: %-3s %d", g->name, is_out ? "out" : "in", func);
seq_printf(s, " %dmA", msm_regval_to_drive(drive));
- seq_printf(s, " %s", pulls[pull]);
+ seq_printf(s, " %s\n", pulls[pull]);
}
static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
@@ -524,23 +529,36 @@ static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
unsigned gpio = chip->base;
unsigned i;
- for (i = 0; i < chip->ngpio; i++, gpio++) {
+ for (i = 0; i < chip->ngpio; i++, gpio++)
msm_gpio_dbg_show_one(s, NULL, chip, i, gpio);
- seq_puts(s, "\n");
- }
}
#else
#define msm_gpio_dbg_show NULL
#endif
+/*
+ * If the requested GPIO has no pins, then treat it as unavailable.
+ * Otherwise, call the standard request function.
+ */
+static int msm_gpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+ struct msm_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct msm_pingroup *g = &pctrl->soc->groups[offset];
+
+ if (!g->npins)
+ return -EACCES;
+
+ return gpiochip_generic_request(chip, offset);
+}
+
static const struct gpio_chip msm_gpio_template = {
.direction_input = msm_gpio_direction_input,
.direction_output = msm_gpio_direction_output,
.get_direction = msm_gpio_get_direction,
.get = msm_gpio_get,
.set = msm_gpio_set,
- .request = gpiochip_generic_request,
+ .request = msm_gpio_request,
.free = gpiochip_generic_free,
.dbg_show = msm_gpio_dbg_show,
};
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2017-12-13 18:30 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-13 18:30 [PATCH 0/3] [v10] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-12-13 18:30 ` [PATCH 1/3] [v2] Revert "gpio: set up initial state from .get_direction()" Timur Tabi
2017-12-13 22:37 ` Stephen Boyd
2017-12-13 18:30 ` Timur Tabi [this message]
2017-12-13 22:37 ` [PATCH 2/3] [v8] pinctrl: qcom: disable GPIO groups with no pins Stephen Boyd
2017-12-13 18:30 ` [PATCH 3/3] [v6] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002 Timur Tabi
2017-12-13 23:01 ` Stephen Boyd
2017-12-13 23:09 ` Timur Tabi
2017-12-19 1:18 ` Timur Tabi
2017-12-19 2:39 ` Stephen Boyd
2017-12-19 4:47 ` Timur Tabi
2017-12-19 19:10 ` Stephen Boyd
2017-12-19 19:27 ` Timur Tabi
2017-12-19 20:30 ` Stephen Boyd
2017-12-19 20:32 ` Timur Tabi
2017-12-19 22:56 ` Timur Tabi
2017-12-20 2:26 ` Stephen Boyd
2017-12-20 4:05 ` Timur Tabi
2017-12-20 8:15 ` Stephen Boyd
2017-12-20 17:46 ` Timur Tabi
2017-12-21 0:39 ` Stephen Boyd
2017-12-21 1:06 ` Timur Tabi
2017-12-22 1:46 ` Stephen Boyd
2018-01-04 15:46 ` Timur Tabi
2018-01-04 16:04 ` Andy Shevchenko
2018-01-09 13:46 ` Linus Walleij
-- strict thread matches above, loose matches on Subject: below --
2017-12-20 19:10 [PATCH 0/3] [v11] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-12-20 19:10 ` [PATCH 2/3] [v8] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-12-12 20:50 [PATCH 0/3] [v9] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-12-12 20:50 ` [PATCH 2/3] [v8] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-12-13 14:42 ` Andy Shevchenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1513189818-7384-3-git-send-email-timur@codeaurora.org \
--to=timur@codeaurora.org \
--cc=andriy.shevchenko@linux.intel.com \
--cc=andy.gross@linaro.org \
--cc=architt@codeaurora.org \
--cc=bjorn.andersson@linaro.org \
--cc=david.brown@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=mika.westerberg@linux.intel.com \
--cc=sboyd@codeaurora.org \
--cc=thierry.reding@gmail.com \
--cc=varada@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).