From: Srinivas Neeli <srinivas.neeli@xilinx.com>
To: bgolaszewski@baylibre.com, michal.simek@xilinx.com,
shubhrajyoti.datta@xilinx.com, sgoud@xilinx.com
Cc: linus.walleij@linaro.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
git@xilinx.com
Subject: [PATCH 1/2] gpio: xilinx: Add clock adaptation support
Date: Mon, 17 Feb 2020 16:27:18 +0530 [thread overview]
Message-ID: <1581937039-12964-1-git-send-email-srinivas.neeli@xilinx.com> (raw)
Add support of clock adaptation for AXI GPIO driver.
Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
---
drivers/gpio/gpio-xilinx.c | 105 ++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 103 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index a9748b5198e6..26753ae58295 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -14,6 +14,8 @@
#include <linux/io.h>
#include <linux/gpio/driver.h>
#include <linux/slab.h>
+#include <linux/pm_runtime.h>
+#include <linux/clk.h>
/* Register Offset Definitions */
#define XGPIO_DATA_OFFSET (0x0) /* Data register */
@@ -38,6 +40,7 @@
* @gpio_state: GPIO state shadow register
* @gpio_dir: GPIO direction shadow register
* @gpio_lock: Lock used for synchronization
+ * @clk: clock resource for this driver
*/
struct xgpio_instance {
struct gpio_chip gc;
@@ -45,7 +48,8 @@ struct xgpio_instance {
unsigned int gpio_width[2];
u32 gpio_state[2];
u32 gpio_dir[2];
- spinlock_t gpio_lock[2];
+ spinlock_t gpio_lock[2]; /* For serializing operations */
+ struct clk *clk;
};
static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
@@ -255,6 +259,70 @@ static void xgpio_save_regs(struct xgpio_instance *chip)
chip->gpio_dir[1]);
}
+static int xgpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+ int ret = pm_runtime_get_sync(chip->parent);
+
+ /*
+ * If the device is already active pm_runtime_get() will return 1 on
+ * success, but gpio_request still needs to return 0.
+ */
+ return ret < 0 ? ret : 0;
+}
+
+static void xgpio_free(struct gpio_chip *chip, unsigned int offset)
+{
+ pm_runtime_put(chip->parent);
+}
+
+static int __maybe_unused xgpio_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ int irq = platform_get_irq(pdev, 0);
+ struct irq_data *data = irq_get_irq_data(irq);
+
+ if (!irqd_is_wakeup_set(data))
+ return pm_runtime_force_suspend(dev);
+
+ return 0;
+}
+
+static int __maybe_unused xgpio_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ int irq = platform_get_irq(pdev, 0);
+ struct irq_data *data = irq_get_irq_data(irq);
+
+ if (!irqd_is_wakeup_set(data))
+ return pm_runtime_force_resume(dev);
+
+ return 0;
+}
+
+static int __maybe_unused xgpio_runtime_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct xgpio_instance *gpio = platform_get_drvdata(pdev);
+
+ clk_disable(gpio->clk);
+
+ return 0;
+}
+
+static int __maybe_unused xgpio_runtime_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct xgpio_instance *gpio = platform_get_drvdata(pdev);
+
+ return clk_enable(gpio->clk);
+}
+
+static const struct dev_pm_ops xgpio_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(xgpio_suspend, xgpio_resume)
+ SET_RUNTIME_PM_OPS(xgpio_runtime_suspend,
+ xgpio_runtime_resume, NULL)
+};
+
/**
* xgpio_of_probe - Probe method for the GPIO device.
* @pdev: pointer to the platform device
@@ -323,6 +391,8 @@ static int xgpio_probe(struct platform_device *pdev)
chip->gc.direction_output = xgpio_dir_out;
chip->gc.get = xgpio_get;
chip->gc.set = xgpio_set;
+ chip->gc.request = xgpio_request;
+ chip->gc.free = xgpio_free;
chip->gc.set_multiple = xgpio_set_multiple;
chip->gc.label = dev_name(&pdev->dev);
@@ -333,15 +403,45 @@ static int xgpio_probe(struct platform_device *pdev)
return PTR_ERR(chip->regs);
}
+ chip->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
+ if (IS_ERR(chip->clk)) {
+ if (PTR_ERR(chip->clk) != -ENOENT) {
+ if (PTR_ERR(chip->clk) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "Input clock not found\n");
+ return PTR_ERR(chip->clk);
+ }
+ /*
+ * Clock framework support is optional, continue on
+ * anyways if we don't find a matching clock.
+ */
+ chip->clk = NULL;
+ }
+ status = clk_prepare_enable(chip->clk);
+ if (status < 0) {
+ dev_err(&pdev->dev, "Failed to prepare clk\n");
+ return status;
+ }
+ pm_runtime_enable(&pdev->dev);
+ status = pm_runtime_get_sync(&pdev->dev);
+ if (status < 0)
+ goto err_unprepare_clk;
+
xgpio_save_regs(chip);
status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
if (status) {
dev_err(&pdev->dev, "failed to add GPIO chip\n");
- return status;
+ goto err_pm_put;
}
+ pm_runtime_put(&pdev->dev);
return 0;
+err_pm_put:
+ pm_runtime_put(&pdev->dev);
+err_unprepare_clk:
+ pm_runtime_disable(&pdev->dev);
+ clk_unprepare(chip->clk);
+ return status;
}
static const struct of_device_id xgpio_of_match[] = {
@@ -356,6 +456,7 @@ static struct platform_driver xgpio_plat_driver = {
.driver = {
.name = "gpio-xilinx",
.of_match_table = xgpio_of_match,
+ .pm = &xgpio_dev_pm_ops,
},
};
--
2.7.4
next reply other threads:[~2020-02-17 10:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-17 10:57 Srinivas Neeli [this message]
2020-02-17 10:57 ` [PATCH 2/2] gpio: xilinx: Add irq support to the driver Srinivas Neeli
2020-02-19 12:39 ` kbuild test robot
2020-02-19 15:00 ` kbuild test robot
2020-04-29 13:56 ` Daniel Mack
2020-02-18 16:02 ` [PATCH 1/2] gpio: xilinx: Add clock adaptation support Bartosz Golaszewski
2020-02-19 11:23 ` Srinivas Neeli
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