From: Wells Lu <wellslutw@gmail.com>
To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: wells.lu@sunplus.com, Wells Lu <wellslutw@gmail.com>
Subject: [PATCH] pinctrl: Fix an error in pin-function table of SP7021
Date: Fri, 15 Apr 2022 17:41:28 +0800 [thread overview]
Message-ID: <1650015688-19774-1-git-send-email-wellslutw@gmail.com> (raw)
The first valid item of pin-function table should
start from the third item. The first two items,
due to historical and compatible reasons, should
be dummy items.
The two dummy items were removed accidentally in
initial submission. This fix adds them back.
Signed-off-by: Wells Lu <wellslutw@gmail.com>
---
drivers/pinctrl/sunplus/sppctl_sp7021.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pinctrl/sunplus/sppctl_sp7021.c b/drivers/pinctrl/sunplus/sppctl_sp7021.c
index 9748345..cd65776 100644
--- a/drivers/pinctrl/sunplus/sppctl_sp7021.c
+++ b/drivers/pinctrl/sunplus/sppctl_sp7021.c
@@ -419,7 +419,15 @@ static const struct sppctl_grp sp7021grps_prbp[] = {
EGRP("PROBE_PORT2", 2, pins_prp2),
};
+/*
+ * Due to compatible reason, the first valid item should start at the third
+ * position of the array. Please keep the first two items of the table
+ * no use (dummy).
+ */
const struct sppctl_func sppctl_list_funcs[] = {
+ FNCN("", pinmux_type_fpmx, 0x00, 0, 0),
+ FNCN("", pinmux_type_fpmx, 0x00, 0, 0),
+
FNCN("L2SW_CLK_OUT", pinmux_type_fpmx, 0x00, 0, 7),
FNCN("L2SW_MAC_SMI_MDC", pinmux_type_fpmx, 0x00, 8, 7),
FNCN("L2SW_LED_FLASH0", pinmux_type_fpmx, 0x01, 0, 7),
--
2.7.4
next reply other threads:[~2022-04-15 9:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-15 9:41 Wells Lu [this message]
2022-04-21 14:29 ` [PATCH] pinctrl: Fix an error in pin-function table of SP7021 Linus Walleij
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