From: haibo.chen@nxp.com
To: linus.walleij@linaro.org, brgl@bgdev.pl, marek.vasut@gmail.com
Cc: linux-gpio@vger.kernel.org, haibo.chen@nxp.com, linux-imx@nxp.com
Subject: [PATCH 2/3] gpio: pca953x: use the correct range when do regmap sync
Date: Mon, 18 Jul 2022 16:31:42 +0800 [thread overview]
Message-ID: <1658133103-23394-2-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1658133103-23394-1-git-send-email-haibo.chen@nxp.com>
From: Haibo Chen <haibo.chen@nxp.com>
regmap will sync a range of registers, here use the correct range
to make sure the sync do not touch other unexpected registers.
Find on pca9557pw on imx8qxp/dxl evk board, this device support
8 pin, so only need one register(8 bits) to cover all the 8 pins's
property setting. But when sync the output, we find it actually
update two registers, output register and the following register.
Fixes: b76574300504 ("gpio: pca953x: Restore registers after suspend/resume cycle")
Fixes: ec82d1eba346 ("gpio: pca953x: Zap ad-hoc reg_output cache")
Fixes: 0f25fda840a9 ("gpio: pca953x: Zap ad-hoc reg_direction cache")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/gpio/gpio-pca953x.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 7209f69a8e8d..18888ec24d04 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -912,12 +912,12 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
int ret;
ret = regcache_sync_region(chip->regmap, chip->regs->output,
- chip->regs->output + NBANK(chip));
+ chip->regs->output + NBANK(chip) - 1);
if (ret)
goto out;
ret = regcache_sync_region(chip->regmap, chip->regs->direction,
- chip->regs->direction + NBANK(chip));
+ chip->regs->direction + NBANK(chip) - 1);
if (ret)
goto out;
@@ -1130,14 +1130,14 @@ static int pca953x_regcache_sync(struct device *dev)
* sync these registers first and only then sync the rest.
*/
regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0);
- ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip));
+ ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1);
if (ret) {
dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
return ret;
}
regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0);
- ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip));
+ ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1);
if (ret) {
dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
return ret;
@@ -1147,7 +1147,7 @@ static int pca953x_regcache_sync(struct device *dev)
if (chip->driver_data & PCA_PCAL) {
regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0);
ret = regcache_sync_region(chip->regmap, regaddr,
- regaddr + NBANK(chip));
+ regaddr + NBANK(chip) - 1);
if (ret) {
dev_err(dev, "Failed to sync INT latch registers: %d\n",
ret);
@@ -1156,7 +1156,7 @@ static int pca953x_regcache_sync(struct device *dev)
regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0);
ret = regcache_sync_region(chip->regmap, regaddr,
- regaddr + NBANK(chip));
+ regaddr + NBANK(chip) - 1);
if (ret) {
dev_err(dev, "Failed to sync INT mask registers: %d\n",
ret);
--
2.25.1
next prev parent reply other threads:[~2022-07-18 8:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-18 8:31 [PATCH 1/3] gpio: pca953x: only use single read/write for No AI mode haibo.chen
2022-07-18 8:31 ` haibo.chen [this message]
2022-07-18 8:31 ` [PATCH 3/3] gpio: pca953x: use the correct register address when regcache sync during init haibo.chen
2022-07-18 12:00 ` Andy Shevchenko
2022-07-19 9:21 ` Bartosz Golaszewski
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