From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5FFE42070; Mon, 17 Mar 2025 15:10:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742224229; cv=none; b=qgOzKnJ+Il0a5fSF50jxNeFOySpOc79fvOC3wTIQU7eNYrH9yFM3vVWL63QJzbOFY5IFVM+Vojs8+rj8JrFwOjqxbMtdtaRi9wRPjFxC7JZT0naIJ7HGt2zg+yTQ+VRZAe48C2V/X4f2g3ohlxDaIh7P0VXaJlo1TrURt9ScPFU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742224229; c=relaxed/simple; bh=kqYx6b0Q2AbSrlMWtByIV/qXFsF3L/buRpNOgC/su3w=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=aKDc1tKQXmWRjDtJexiaAFpTJ9OQA0vZNPyElVksiCoW6BtGYNzwnE/kFQ/VpvyPhvrQrdSkxitQbQpvN8kYIZz0GCUudrBFXTqPjRqwODI0xq43DlM2DsCbf34Y+gS6oeifkrMu41DrHwWlriAa9B6nRXwLiHfrt3Ia5KUId/I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q/VXCgWB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q/VXCgWB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8EF97C4CEE3; Mon, 17 Mar 2025 15:10:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742224228; bh=kqYx6b0Q2AbSrlMWtByIV/qXFsF3L/buRpNOgC/su3w=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Q/VXCgWBx9flKktGMWIUTFGlAe43G0ITwTm7+0NelEZG76xYgZqJyluVWVCJVk7tE K1E+OxKUIQqjySmc3D438fVyvypZCX1Q0jscm1dzhcwRoCpFZzDwhD88BINihbXO8D PPhmj8kmp5T3LQNe+8EObPRuIea+viUFvZN3PFWBAFx83tbhhmK5bYOoRZ2kpMJQGP E7moIz8VDvJbBMhb7L/5BcI0zXnyFJ1PcsUo7HpKJbYDP4SmIx7/nlrAVqrSVdVVQm 1Rt5bhjooZG+GQtq04zSV8oxTpr4eqSm3/FFcsRKsGx0xy13LipZV45MRZQokn2+6S D05sCT7Zle3nA== Message-ID: <1b8228df-e007-4ecf-92b7-d4833efbc765@kernel.org> Date: Mon, 17 Mar 2025 16:10:13 +0100 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/6] dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller To: =?UTF-8?B?QmFybmFiw6FzIEN6w6ltw6Fu?= Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephan Gerhold , =?UTF-8?Q?Otto_Pfl=C3=BCger?= , Linus Walleij , Lee Jones , Srinivas Kandagatla , Joerg Roedel , Will Deacon , Robin Murphy , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux@mainlining.org References: <20250315-msm8937-v4-0-1f132e870a49@mainlining.org> <20250315-msm8937-v4-1-1f132e870a49@mainlining.org> <20250317-hot-obedient-sturgeon-394cb8@krzk-bin> <11695D76-7CBE-41CE-A8DD-D6845D01670C@mainlining.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 17/03/2025 10:57, Barnabás Czémán wrote: > > > On March 17, 2025 10:17:46 AM GMT+01:00, Krzysztof Kozlowski wrote: >> On Sat, Mar 15, 2025 at 03:57:35PM +0100, Barnabás Czémán wrote: >>> Add device tree bindings for the global clock controller on Qualcomm >>> MSM8937 platform. >>> >>> Signed-off-by: Barnabás Czémán >>> --- >>> .../bindings/clock/qcom,gcc-msm8937.yaml | 75 ++++++++++++++++++++++ >>> include/dt-bindings/clock/qcom,gcc-msm8917.h | 17 +++++ >>> 2 files changed, 92 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml >>> new file mode 100644 >>> index 0000000000000000000000000000000000000000..3c3f6756048e195671f542b3a6cd09057558eafa >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml >>> @@ -0,0 +1,75 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8937.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Qualcomm Global Clock & Reset Controller on MSM8937 >>> + >>> +maintainers: >>> + - Barnabas Czeman >>> + >>> +description: | >>> + Qualcomm global clock control module provides the clocks, resets and power >>> + domains on MSM8937. >> >> This is exactly like msm8953, so why it cannot be there? >> > Not exactly clock names are different, msm8953 have sleep msm8937 have sleep_clk. But this is the same clock, isn't it? And while we are at this: fix the name, so "sleep" because there is no point to write that an entry in clock-names is a clock. There is no "_clk" anywhere else. >>> + >>> + See also:: >>> + include/dt-bindings/clock/qcom,gcc-msm8917.h >> >> typo, 8937 >> > No Ack >>> + >>> +properties: >>> + compatible: >>> + const: qcom,gcc-msm8937 >>> + >>> + clocks: >>> + items: >>> + - description: XO source >>> + - description: Sleep clock source >>> + - description: DSI phy instance 0 dsi clock >>> + - description: DSI phy instance 0 byte clock >>> + - description: DSI phy instance 1 dsi clock >>> + - description: DSI phy instance 1 byte clock >>> + >>> + clock-names: >>> + items: >>> + - const: xo >>> + - const: sleep_clk >>> + - const: dsi0pll >>> + - const: dsi0pllbyte >>> + - const: dsi1pll >>> + - const: dsi1pllbyte >>> + >>> +required: >>> + - compatible >>> + - clocks >>> + - clock-names >>> + - '#power-domain-cells' >>> + >>> +allOf: >>> + - $ref: qcom,gcc.yaml# >>> + >>> +unevaluatedProperties: false >>> + >>> +examples: >>> + - | >>> + #include >>> + >>> + clock-controller@1800000 { >>> + compatible = "qcom,gcc-msm8937"; >>> + reg = <0x01800000 0x80000>; >>> + #clock-cells = <1>; >>> + #reset-cells = <1>; >>> + #power-domain-cells = <1>; >>> + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, >>> + <&sleep_clk>, >>> + <&dsi0_phy 1>, >>> + <&dsi0_phy 0>, >>> + <&dsi1_phy 1>, >>> + <&dsi1_phy 0>; >>> + clock-names = "xo", >>> + "sleep_clk", >>> + "dsi0pll", >>> + "dsi0pllbyte", >>> + "dsi1pll", >>> + "dsi1pllbyte"; >>> + }; >>> +... >>> diff --git a/include/dt-bindings/clock/qcom,gcc-msm8917.h b/include/dt-bindings/clock/qcom,gcc-msm8917.h >>> index 4b421e7414b50bef2e2400f868ae5b7212a427bb..ec1f0b261dd5ccfe4896a00ffa9cf86de98b9cb3 100644 >>> --- a/include/dt-bindings/clock/qcom,gcc-msm8917.h >>> +++ b/include/dt-bindings/clock/qcom,gcc-msm8917.h >>> @@ -170,6 +170,22 @@ >>> #define VFE1_CLK_SRC 163 >>> #define VSYNC_CLK_SRC 164 >>> #define GPLL0_SLEEP_CLK_SRC 165 >>> +#define BLSP1_QUP1_I2C_APPS_CLK_SRC 166 >>> +#define BLSP1_QUP1_SPI_APPS_CLK_SRC 167 >>> +#define BLSP2_QUP4_I2C_APPS_CLK_SRC 168 >>> +#define BLSP2_QUP4_SPI_APPS_CLK_SRC 169 >> >> Why are you adding bindings to 8917? Nothing in commit msg explains >> that. > Because msm8917 driver was expanded with 8937 bits, i will expand the commit message. But this is about hardware, not driver. If you want to combine in one bindings devices from the same family (which I doubt these are, too many differences), then make it clear with prefixes, see 61b17d072d811df5733a1570889b8c6fa6834bf8 If they are not that related, then a separate file. >> >> Best regards, >> Krzysztof >> Best regards, Krzysztof