From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Subject: Re: [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Date: Tue, 19 Sep 2017 07:32:22 -0500 Message-ID: <1ecdf6ee-5098-15d3-f85e-66b39a6c25f9@codeaurora.org> References: <1504798409-32041-1-git-send-email-timur@codeaurora.org> <20170919070422.GI3349@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:50564 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750823AbdISMcc (ORCPT ); Tue, 19 Sep 2017 08:32:32 -0400 In-Reply-To: Content-Language: en-US Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Linus Walleij , Stephen Boyd Cc: Andy Gross , David Brown , anjiandi@codeaurora.org, Bjorn Andersson , "linux-gpio@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-arm-msm@vger.kernel.org" , "thierry.reding@gmail.com" , Mika Westerberg , Andy Shevchenko On 9/19/17 3:15 AM, Linus Walleij wrote: > Oh we already have that I think, Mika Westerberg and Andy Shevcheno > implemented that for anyone using CONFIG_GPIOLIB_IRQCHIP, and > this driver does. Timur please check: irq_need_valid_mask, irq_valid_mask > usage. These patches already use irq_valid_mask! But that doesn't block complete access to the GPIO. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation.