From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Guo Subject: Re: [PATCH v2 6/8] ARM: dts: imx: add imx6ul and imx6ul evk board support Date: Thu, 9 Jul 2015 21:42:00 +0800 Message-ID: <20150709134200.GH23464@tiger> References: <1434727951-4852-1-git-send-email-Frank.Li@freescale.com> <1434727951-4852-7-git-send-email-Frank.Li@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mail.kernel.org ([198.145.29.136]:47173 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752375AbbGINmP (ORCPT ); Thu, 9 Jul 2015 09:42:15 -0400 Content-Disposition: inline In-Reply-To: Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Zhi Li Cc: Nicolae Rosia , "devicetree@vger.kernel.org" , Fancy Fang , Frank Li , Linus Walleij , linux-gpio@vger.kernel.org, Rob Herring , Fugang Duan , Anson Huang , Shawn Guo , "linux-arm-kernel@lists.infradead.org" On Fri, Jun 19, 2015 at 01:55:46PM -0500, Zhi Li wrote: > On Fri, Jun 19, 2015 at 12:05 PM, Nicolae Rosia wrote: > > Hi, > > > > On Fri, Jun 19, 2015 at 6:32 PM, wrote: > >> From: Frank Li > > [...] > >> + cpus { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + cpu0: cpu@0 { > >> + compatible = "arm,cortex-a7"; > >> + device_type = "cpu"; > >> + reg = <0>; > >> + clock-latency = <61036>; /* two CLK32 periods */ > >> + operating-points = < > >> + /* kHz uV */ > >> + 528000 1250000 > >> + 396000 1150000 > >> + 198000 1150000 > >> + >; > >> + fsl,soc-operating-points = < > >> + /* KHz uV */ > >> + 528000 1250000 > >> + 396000 1150000 > >> + 198000 1150000 > >> + >; > > Why is this necessary? Can't you adapt the driver to use operating-points? > > I have looked through other imx dts and saw that some had different > > values in these two tables. > > It is used by internal busfreq driver. I will remove it at next version. It's used by mainline imx6q-cpufreq driver, but it's a piece of undocumented binding. Basically, on i.MX6 series, when CPU frequency scales, there are two voltages, 'core' and 'soc', need to scale accordingly. The OPP binding v1 only supports one voltage. Shawn